[Intel-gfx] [RFC 5/6] drm/i915/pmu: Add submitted counter
Tvrtko Ursulin
tursulin at ursulin.net
Thu Jan 18 10:41:35 UTC 2018
From: Tvrtko Ursulin <tvrtko.ursulin at intel.com>
We add a PMU counter to expose the number of requests currently submitted
to the driver which are not yet runnable on the GPU (unresolved
dependencies or unsignalled fences).
This is useful to analyze the overall load of the system.
Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin at intel.com>
---
drivers/gpu/drm/i915/i915_pmu.c | 14 ++++++++++++--
drivers/gpu/drm/i915/intel_ringbuffer.h | 2 +-
include/uapi/drm/i915_drm.h | 7 ++++++-
3 files changed, 19 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_pmu.c b/drivers/gpu/drm/i915/i915_pmu.c
index aaf48e85c35e..d6d08cca2bc8 100644
--- a/drivers/gpu/drm/i915/i915_pmu.c
+++ b/drivers/gpu/drm/i915/i915_pmu.c
@@ -37,7 +37,8 @@
(BIT(I915_SAMPLE_BUSY) | \
BIT(I915_SAMPLE_WAIT) | \
BIT(I915_SAMPLE_SEMA) | \
- BIT(I915_SAMPLE_QUEUED))
+ BIT(I915_SAMPLE_QUEUED) | \
+ BIT(I915_SAMPLE_SUBMITTED))
#define ENGINE_SAMPLE_BITS (1 << I915_PMU_SAMPLE_BITS)
@@ -226,6 +227,11 @@ static void engines_sample(struct drm_i915_private *dev_priv)
update_sample(&engine->pmu.sample[I915_SAMPLE_QUEUED],
1 / I915_SAMPLE_QUEUED_SCALE,
engine->queued);
+
+ if (engine->pmu.enable & BIT(I915_SAMPLE_SUBMITTED))
+ update_sample(&engine->pmu.sample[I915_SAMPLE_SUBMITTED],
+ 1 / I915_SAMPLE_SUBMITTED_SCALE,
+ atomic_read(&engine->submitted));
}
if (fw)
@@ -304,6 +310,7 @@ engine_event_status(struct intel_engine_cs *engine,
case I915_SAMPLE_BUSY:
case I915_SAMPLE_WAIT:
case I915_SAMPLE_QUEUED:
+ case I915_SAMPLE_SUBMITTED:
break;
case I915_SAMPLE_SEMA:
if (INTEL_GEN(engine->i915) < 6)
@@ -415,7 +422,8 @@ static u64 __i915_pmu_event_read(struct perf_event *event)
val = engine->pmu.sample[sample].cur;
}
- if (sample == I915_SAMPLE_QUEUED)
+ if (sample == I915_SAMPLE_QUEUED ||
+ sample == I915_SAMPLE_SUBMITTED)
val = div_u64(val, FREQUENCY);
} else {
switch (event->attr.config) {
@@ -790,6 +798,8 @@ create_event_attributes(struct drm_i915_private *i915)
__engine_event(I915_SAMPLE_WAIT, "wait"),
__engine_event_scale(I915_SAMPLE_QUEUED, "queued",
__stringify(I915_SAMPLE_QUEUED_SCALE)),
+ __engine_event_scale(I915_SAMPLE_SUBMITTED, "submitted",
+ __stringify(I915_SAMPLE_SUBMITTED_SCALE)),
};
unsigned int count = 0;
struct perf_pmu_events_attr *pmu_attr = NULL, *pmu_iter;
diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.h b/drivers/gpu/drm/i915/intel_ringbuffer.h
index 84541b91bcd8..01355fc24d1e 100644
--- a/drivers/gpu/drm/i915/intel_ringbuffer.h
+++ b/drivers/gpu/drm/i915/intel_ringbuffer.h
@@ -379,7 +379,7 @@ struct intel_engine_cs {
*
* Our internal timer stores the current counters in this field.
*/
-#define I915_ENGINE_SAMPLE_MAX (I915_SAMPLE_QUEUED + 1)
+#define I915_ENGINE_SAMPLE_MAX (I915_SAMPLE_SUBMITTED + 1)
struct i915_pmu_sample sample[I915_ENGINE_SAMPLE_MAX];
/**
* @busy_stats: Has enablement of engine stats tracking been
diff --git a/include/uapi/drm/i915_drm.h b/include/uapi/drm/i915_drm.h
index 83458e5b1ac7..3285027a6ce0 100644
--- a/include/uapi/drm/i915_drm.h
+++ b/include/uapi/drm/i915_drm.h
@@ -111,10 +111,12 @@ enum drm_i915_pmu_engine_sample {
I915_SAMPLE_BUSY = 0,
I915_SAMPLE_WAIT = 1,
I915_SAMPLE_SEMA = 2,
- I915_SAMPLE_QUEUED = 3
+ I915_SAMPLE_QUEUED = 3,
+ I915_SAMPLE_SUBMITTED = 4,
};
#define I915_SAMPLE_QUEUED_SCALE 1e-2 /* No braces please. */
+#define I915_SAMPLE_SUBMITTED_SCALE 1e-2 /* No braces please. */
#define I915_PMU_SAMPLE_BITS (4)
#define I915_PMU_SAMPLE_MASK (0xf)
@@ -139,6 +141,9 @@ enum drm_i915_pmu_engine_sample {
#define I915_PMU_ENGINE_QUEUED(class, instance) \
__I915_PMU_ENGINE(class, instance, I915_SAMPLE_QUEUED)
+#define I915_PMU_ENGINE_SUBMITTED(class, instance) \
+ __I915_PMU_ENGINE(class, instance, I915_SAMPLE_SUBMITTED)
+
#define __I915_PMU_OTHER(x) (__I915_PMU_ENGINE(0xff, 0xff, 0xf) + 1 + (x))
#define I915_PMU_ACTUAL_FREQUENCY __I915_PMU_OTHER(0)
--
2.14.1
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