[Intel-gfx] [RFC 6/6] drm/i915/pmu: Add running counter

Tvrtko Ursulin tvrtko.ursulin at linux.intel.com
Fri Jan 19 11:45:24 UTC 2018


On 18/01/2018 11:57, Chris Wilson wrote:
> Quoting Tvrtko Ursulin (2018-01-18 10:41:36)
>> From: Tvrtko Ursulin <tvrtko.ursulin at intel.com>
>>
>> We add a PMU counter to expose the number of requests currently executing
>> on the GPU.
>>
>> This is useful to analyze the overall load of the system.
>>
>> Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin at intel.com>
> 
> Ok, the split between queued (unmet dependencies),
> submitted (met dependencies, ready for hw) and running (on hw) look good
> to me. The usual slight inaccuracies that may arise due to trying to
> sample across async hw + engines, but those should be minor. And the
> counters seem very useful (at least for the trivial overlay).

Glad to hear positive feedback!

> The only suggestion I would make is perhaps
> 
> 	engine->stats.unready_requests / requests_queued;
> 	engine->stats.requests_ready / requests_submitted;
> 
> (doesn't have to be stats, but I think we want a bit more verbosity
> here).

Hm, what is that? You are suggesting some relative stats? Exposed as 
another counter? It can be calculated in userspace easily.

> Oh, the second suggestion is perhaps not to use 1e-2 :) Talk about
> giving me a fright!

Yes it's a bit scary, just that I wanted to avoid having to have two 
defines which need to be kept in sync. "1e-2" is what needs to go as 
string to sysfs for perf to work correctly. I'll add the second define.

So I'll wait to hear some positive feedback from the feature requestors 
and then respin. IGTs will be a pain...

Regards,

Tvrtko


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