[Intel-gfx] [PATCH 00/16] Adding NV12 support

[Vidya Srinivas]

This patch series is adding NV12 support for Gen >= 9 platforms.
Current testing has been done on Gen9 and Gen10 only.

Initial series of the patches can be found here:
https://lists.freedesktop.org/archives/intel-gfx/2015-May/066786.html

Previous revision history:
The first version of patches were reviewed when floated by Chandra in 2015
but currently there was a design change with respect to
- the way fb offset is handled
- the way rotation is handled
Current NV12 patch series has been ported as per the
current changes on drm-tip

Review comments from Ville (12th June 2017) have been addressed Review
comments from Clinton A Taylor (7th July 2017) have been addressed

Review comments from Clinton A Taylor (10th July 2017)
have been addressed. Had missed out tested-by/reviewed-by in the patches.
Fixed that error in this series.
Review comments from Ville (11th July 2017) addressed.
Review comments from Paauwe, Bob (29th July 2017) addressed.

Update from rev 28 Aug 2017
Rebased the series.
Tested with IGT for rotation, sprite and tiling combinations.
IGT Links:
https://patchwork.kernel.org/patch/9995943/
https://patchwork.kernel.org/patch/9995945/

Update from last rev (Jan 16th 2018):
Rebased the series.
Review comments by Maarten are addressed in this series.
NV12 is enabled and tested on Gen10.

Patches are tested (dependent on) watermark necessary changes
https://patchwork.freedesktop.org/series/33439/

Chandra Konduru (6):
  drm/i915: Set scaler mode for NV12
  drm/i915: Update format_is_yuv() to include NV12
  drm/i915: Upscale scaler max scale for NV12
  drm/i915: Add NV12 as supported format for primary plane
  drm/i915: Add NV12 as supported format for sprite plane
  drm/i915: Add NV12 support to intel_framebuffer_init

Mahesh Kumar (9):
  drm/i915/skl+: rename skl_wm_values struct to skl_ddb_values
  drm/i915/skl+: refactor WM calculation for NV12
  drm/i915/skl+: add NV12 in skl_format_to_fourcc
  drm/i915/skl+: support verification of DDB HW state for NV12
  drm/i915/skl+: NV12 related changes for WM
  drm/i915/skl+: pass skl_wm_level struct to wm compute func
  drm/i915/skl+: make sure higher latency level has higher wm value
  drm/i915/skl+: nv12 workaround disable WM level 1-7
  drm/i915/skl: split skl_compute_ddb function

Vidya Srinivas (1):
  drm/i915: Enable YUV to RGB for Gen10 in Plane Ctrl Reg

 drivers/gpu/drm/i915/i915_drv.h      |   9 +-
 drivers/gpu/drm/i915/i915_reg.h      |   7 +
 drivers/gpu/drm/i915/intel_atomic.c  |   8 +-
 drivers/gpu/drm/i915/intel_display.c |  51 ++++-
 drivers/gpu/drm/i915/intel_drv.h     |   9 +-
 drivers/gpu/drm/i915/intel_pm.c      | 433 ++++++++++++++++++++++-------------
 drivers/gpu/drm/i915/intel_sprite.c  |  16 +-
 7 files changed, 346 insertions(+), 187 deletions(-)

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2.7.4