[Intel-gfx] [PATCH 09/10] drm/i915/cnl: Fix DP max rate for Cannonlake with port F.

[Ville Syrjälä]

On Fri, Jan 19, 2018 at 04:05:23PM -0800, Rodrigo Vivi wrote:
> On CNL SKUs that uses port F,  max DP rate is 8.1G for all
> ports when we have the elevated voltage.
> 
> v2: Make commit message more generic.
> 
> Cc: Lucas De Marchi <lucas.demarchi at intel.com>
> Cc: Manasi Navare <manasi.d.navare at intel.com>
> Signed-off-by: Rodrigo Vivi <rodrigo.vivi at intel.com>
> ---
>  drivers/gpu/drm/i915/intel_dp.c | 5 +++--
>  1 file changed, 3 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
> index 4b963732454d..36826460d8fb 100644
> --- a/drivers/gpu/drm/i915/intel_dp.c
> +++ b/drivers/gpu/drm/i915/intel_dp.c
> @@ -240,8 +240,9 @@ intel_dp_set_source_rates(struct intel_dp *intel_dp)
>  		source_rates = cnl_rates;
>  		size = ARRAY_SIZE(cnl_rates);
>  		voltage = I915_READ(CNL_PORT_COMP_DW3) & VOLTAGE_INFO_MASK;
> -		if (port == PORT_A || port == PORT_D ||
> -		    voltage == VOLTAGE_INFO_0_85V)
> +		if (voltage == VOLTAGE_INFO_0_85V ||
> +		    (!IS_CNL_WITH_PORT_F(dev_priv) && (port == PORT_A ||
> +						       port == PORT_D)))

This is getting a bit hard to parse. Maybe move all these checks to a
small helper that is easier to read?

>  			size -= 2;
>  	} else if (IS_GEN9_BC(dev_priv)) {
>  		source_rates = skl_rates;
> -- 
> 2.13.6
> 
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-- 
Ville Syrjälä
Intel OTC