[Intel-gfx] [PATCH] drm/i915/execlists: Inhibit context save/restore for the fake preempt context

[Daniele Ceraolo Spurio]

On 23/01/18 10:53, Michel Thierry wrote:
> On 1/23/2018 9:05 AM, Chris Wilson wrote:
>> We only use the preempt context to inject an idle point into execlists.
>> We never need to reference its logical state, so tell the GPU never to
>> load it or save it.
>>
>> Suggested-by: Daniele Ceraolo Spurio <daniele.ceraolospurio at intel.com>

I don't think I deserve credit for this...

>> Signed-off-by: Chris Wilson <chris at chris-wilson.co.uk>
>> Cc: Michal Winiarski <michal.winiarski at intel.com>
>> Cc: Michel Thierry <michel.thierry at intel.com>
>> Cc: Michal Wajdeczko <michal.wajdeczko at intel.com>
>> Cc: Tvrtko Ursulin <tvrtko.ursulin at intel.com>
>> Cc: Mika Kuoppala <mika.kuoppala at intel.com>
>> ---
>> Please check the register definition. I know the save-inhibit bit used
>> to exist, I don't know if it is BIT(1) in RING_CONTEXT_CONTROL -- it
>> feels like it should be, and the numbers indicate that it does
>> something beneficial.
> 
> Hi,
> 
>> -Chris
>> ---
>>   drivers/gpu/drm/i915/intel_lrc.c | 4 ++++
>>   drivers/gpu/drm/i915/intel_lrc.h | 1 +
>>   2 files changed, 5 insertions(+)
>>
>> diff --git a/drivers/gpu/drm/i915/intel_lrc.c 
>> b/drivers/gpu/drm/i915/intel_lrc.c
>> index 22d471a4228d..c28f267a8417 100644
>> --- a/drivers/gpu/drm/i915/intel_lrc.c
>> +++ b/drivers/gpu/drm/i915/intel_lrc.c
>> @@ -2285,6 +2285,10 @@ populate_lr_context(struct i915_gem_context *ctx,
>>       if (!engine->default_state)
>>           regs[CTX_CONTEXT_CONTROL + 1] |=
>>               _MASKED_BIT_ENABLE(CTX_CTRL_ENGINE_CTX_RESTORE_INHIBIT);
>> +    if (ctx->hw_id == PREEMPT_ID)
>> +        regs[CTX_CONTEXT_CONTROL + 1] |=
>> +            _MASKED_BIT_ENABLE(CTX_CTRL_ENGINE_CTX_RESTORE_INHIBIT |
>> +                       CTX_CTRL_ENGINE_CTX_SAVE_INHIBIT);
>>       i915_gem_object_unpin_map(ctx_obj);
>> diff --git a/drivers/gpu/drm/i915/intel_lrc.h 
>> b/drivers/gpu/drm/i915/intel_lrc.h
>> index 6d4f9b995a11..e6e2c1774600 100644
>> --- a/drivers/gpu/drm/i915/intel_lrc.h
>> +++ b/drivers/gpu/drm/i915/intel_lrc.h
>> @@ -36,6 +36,7 @@
>>   #define RING_CONTEXT_CONTROL(engine)        
>> _MMIO((engine)->mmio_base + 0x244)
>>   #define      CTX_CTRL_INHIBIT_SYN_CTX_SWITCH    (1 << 3)
>>   #define      CTX_CTRL_ENGINE_CTX_RESTORE_INHIBIT    (1 << 0)
>> +#define      CTX_CTRL_ENGINE_CTX_SAVE_INHIBIT    (1 << 1)
>>   #define   CTX_CTRL_RS_CTX_ENABLE                (1 << 1)
> 
> BIT(0) is Engine Context Restore Inhibit,
> BIT(1) is Resource Streamer Context Enable (in RCS), and
> BIT(2) is Context Save Inhibit.
> 

FYI, specs also says that BIT(2) is deprecated and must not be set for ICL.

Daniele

> 
>>   #define RING_CONTEXT_STATUS_BUF_BASE(engine)    
>> _MMIO((engine)->mmio_base + 0x370)
>>   #define RING_CONTEXT_STATUS_BUF_LO(engine, i)    
>> _MMIO((engine)->mmio_base + 0x370 + (i) * 8)
>>
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