[Intel-gfx] [PATCH] drm/i915/cnp: Properly handle VBT ddc pin out of bounds.

[Jani Nikula]

On Wed, 24 Jan 2018, Rodrigo Vivi <rodrigo.vivi at intel.com> wrote:
> If the table result is out of bounds on the array map
> there is something really wrong with VBT pin so we don't
> return that vbt_pin, but only return 0 instead.
>
> This basically reverts commit 'a8e6f3888b05 ("drm/i915/cnp:
> Ignore VBT request for know invalid DDC pin.")'
>
> Also this properly fixes commit 9c3b2689d01f ("drm/i915/cnl:
> Map VBT DDC Pin to BSpec DDC Pin.")
>
> Fixes: a8e6f3888b05 ("drm/i915/cnp: Ignore VBT request for know invalid DDC pin.")
> Fixes: 9c3b2689d01f ("drm/i915/cnl: Map VBT DDC Pin to BSpec DDC Pin.")
> Cc: Radhakrishna Sripada <radhakrishna.sripada at intel.com>
> Cc: Jani Nikula <jani.nikula at intel.com>
> Cc: Kai Heng Feng <kai.heng.feng at canonical.com>
> Signed-off-by: Rodrigo Vivi <rodrigo.vivi at intel.com>
> ---
>  drivers/gpu/drm/i915/intel_bios.c | 13 ++++---------
>  1 file changed, 4 insertions(+), 9 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_bios.c b/drivers/gpu/drm/i915/intel_bios.c
> index 95f0b310d656..844c1e8f574f 100644
> --- a/drivers/gpu/drm/i915/intel_bios.c
> +++ b/drivers/gpu/drm/i915/intel_bios.c
> @@ -1115,16 +1115,11 @@ static const u8 cnp_ddc_pin_map[] = {
>  
>  static u8 map_ddc_pin(struct drm_i915_private *dev_priv, u8 vbt_pin)
>  {
> -	if (HAS_PCH_CNP(dev_priv)) {
> -		if (vbt_pin > 0 && vbt_pin < ARRAY_SIZE(cnp_ddc_pin_map))
> -			return cnp_ddc_pin_map[vbt_pin];
> -		if (vbt_pin > GMBUS_PIN_4_CNP) {
> -			DRM_DEBUG_KMS("Ignoring alternate pin: VBT claims DDC pin %d, which is not valid for this platform\n", vbt_pin);
> -			return 0;
> -		}
> -	}
> +	if (HAS_PCH_CNP(dev_priv) &&
> +	    vbt_pin > 0 && vbt_pin < ARRAY_SIZE(cnp_ddc_pin_map))
> +		return cnp_ddc_pin_map[vbt_pin];
>  
> -	return vbt_pin;
> +	return 0;

Well this breaks all non-CNP...

BR,
Jani.


>  }
>  
>  static void parse_ddi_port(struct drm_i915_private *dev_priv, enum port port,

-- 
Jani Nikula, Intel Open Source Technology Center