[Intel-gfx] [PATCH] drm/i915/cnp: Properly handle VBT ddc pin out of bounds.

[Rodrigo Vivi]

On Thu, Jan 25, 2018 at 03:52:26PM +0000, Jani Nikula wrote:
> On Thu, 25 Jan 2018, Rodrigo Vivi <rodrigo.vivi at intel.com> wrote:
> > If the table result is out of bounds on the array map
> > there is something really wrong with VBT pin so we don't
> > return that vbt_pin, but only return 0 instead.
> >
> > This basically reverts commit 'a8e6f3888b05 ("drm/i915/cnp:
> > Ignore VBT request for know invalid DDC pin.")'
> >
> > Also this properly fixes commit 9c3b2689d01f ("drm/i915/cnl:
> > Map VBT DDC Pin to BSpec DDC Pin.")
> >
> > v2: Do in a way that we don't break other platforms. (Jani)
> > v3: Keep debug message (Jani)
> >
> > Fixes: a8e6f3888b05 ("drm/i915/cnp: Ignore VBT request for know invalid DDC pin.")
> > Fixes: 9c3b2689d01f ("drm/i915/cnl: Map VBT DDC Pin to BSpec DDC Pin.")
> > Cc: Radhakrishna Sripada <radhakrishna.sripada at intel.com>
> > Cc: Jani Nikula <jani.nikula at intel.com>
> > Cc: Kai Heng Feng <kai.heng.feng at canonical.com>
> > Signed-off-by: Rodrigo Vivi <rodrigo.vivi at intel.com>
> > ---
> >  drivers/gpu/drm/i915/intel_bios.c | 4 ++--
> >  1 file changed, 2 insertions(+), 2 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/i915/intel_bios.c b/drivers/gpu/drm/i915/intel_bios.c
> > index 95f0b310d656..06526b17a011 100644
> > --- a/drivers/gpu/drm/i915/intel_bios.c
> > +++ b/drivers/gpu/drm/i915/intel_bios.c
> > @@ -1116,9 +1116,9 @@ static const u8 cnp_ddc_pin_map[] = {
> >  static u8 map_ddc_pin(struct drm_i915_private *dev_priv, u8 vbt_pin)
> >  {
> >  	if (HAS_PCH_CNP(dev_priv)) {
> > -		if (vbt_pin > 0 && vbt_pin < ARRAY_SIZE(cnp_ddc_pin_map))
> > +		if (vbt_pin > 0 && vbt_pin < ARRAY_SIZE(cnp_ddc_pin_map)) {
> >  			return cnp_ddc_pin_map[vbt_pin];
> > -		if (vbt_pin > GMBUS_PIN_4_CNP) {
> > +		} else {
> 
> You're going to hate me,

hehe... why would I hate you if you are helping me to get
the proper and better code there ;)

> but I just realized this will now complain
> about vbt_pin == 0, which I guess is valid for N/A.

ouch... indeed...
and a common one I'd say. at least during platform enabling times.
imagine the number of bugs we would receive?!

> 
> Why are simple things so hard sometimes... :(
> 
> else if (vbt_pin) ?

So, on the icp the things gets a bit more complicated, because
the proper check for valid pin is not just on the array side.
on cnp is only a cross-over on the array position to pin.

On icp array goes from 0 to 9, but valid pin numbers are
0, 1, 2, 3, 9, A, B, C, D, E.

So, what about leaving the current solution in place and
finding a proper way to check the valid pins per platform
with the PIN numbers and not array position one?

Or any good idea for both already?

> 
> BR,
> Jani.
> 
> 
> >  			DRM_DEBUG_KMS("Ignoring alternate pin: VBT claims DDC pin %d, which is not valid for this platform\n", vbt_pin);
> >  			return 0;
> >  		}
> 
> -- 
> Jani Nikula, Intel Open Source Technology Center