[Intel-gfx] [PATCH 2/2] drm/i915/execlists: Remove the ring advancement under preemption

Michel Thierry michel.thierry at intel.com
Thu Jan 25 18:30:31 UTC 2018


On 1/25/2018 3:24 AM, Chris Wilson wrote:
> Load an empty ringbuffer for preemption, ignoring the lite-restore
> workaround as we now the preempt context is always idle before preemption.

s/we now/we know/?

Looks ok to me; the restriction is to avoid a lite-restore with 
HEAD==TAIL, and as you said the preempt ctx could not be running at this 
point.

Michal(s)/Tvrtko/Mika, any thoughts?

> 
> Signed-off-by: Chris Wilson <chris at chris-wilson.co.uk>
> Cc: Michal Winiarski <michal.winiarski at intel.com>
> Cc: Michel Thierry <michel.thierry at intel.com>
> Cc: Michal Wajdeczko <michal.wajdeczko at intel.com>
> Cc: Tvrtko Ursulin <tvrtko.ursulin at intel.com>
> Cc: Mika Kuoppala <mika.kuoppala at intel.com>
> ---
>   drivers/gpu/drm/i915/intel_lrc.c | 7 -------
>   1 file changed, 7 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c
> index 29b14d7d4b07..d6758838311f 100644
> --- a/drivers/gpu/drm/i915/intel_lrc.c
> +++ b/drivers/gpu/drm/i915/intel_lrc.c
> @@ -449,13 +449,6 @@ static void inject_preempt_context(struct intel_engine_cs *engine)
>   	unsigned int n;
>   
>   	GEM_BUG_ON(engine->i915->preempt_context->hw_id != PREEMPT_ID);
> -	GEM_BUG_ON(!IS_ALIGNED(ce->ring->size, WA_TAIL_BYTES));
> -
> -	memset(ce->ring->vaddr + ce->ring->tail, 0, WA_TAIL_BYTES);
> -	ce->ring->tail += WA_TAIL_BYTES;
> -	ce->ring->tail &= (ce->ring->size - 1);
> -	ce->lrc_reg_state[CTX_RING_TAIL+1] = ce->ring->tail;
> -
>   	GEM_BUG_ON((ce->lrc_reg_state[CTX_CONTEXT_CONTROL + 1] &
>   		    _MASKED_BIT_ENABLE(CTX_CTRL_ENGINE_CTX_RESTORE_INHIBIT |
>   				       CTX_CTRL_ENGINE_CTX_SAVE_INHIBIT)) !=
> 


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