[Intel-gfx] [PATCH v3 12/20] drm/i915/icl: Program T_INIT_MASTER registers
Madhav Chauhan
madhav.chauhan at intel.com
Thu Jul 5 13:01:59 UTC 2018
This patch programs the time (in escape clocks) to drive
the link in the initialization (i.e. LP-11) state.
v2: Rebase
Signed-off-by: Madhav Chauhan <madhav.chauhan at intel.com>
---
drivers/gpu/drm/i915/gen11_dsi.c | 19 +++++++++++++++++++
1 file changed, 19 insertions(+)
diff --git a/drivers/gpu/drm/i915/gen11_dsi.c b/drivers/gpu/drm/i915/gen11_dsi.c
index 0f481af..db65633 100644
--- a/drivers/gpu/drm/i915/gen11_dsi.c
+++ b/drivers/gpu/drm/i915/gen11_dsi.c
@@ -270,6 +270,22 @@ static void gen11_dsi_enable_ddi_buffer(struct intel_encoder *encoder)
}
}
+static void gen11_dsi_setup_dphy_timings(struct intel_encoder *encoder)
+{
+ struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
+ struct intel_dsi *intel_dsi = enc_to_intel_dsi(&encoder->base);
+ u32 tmp;
+ enum port port;
+
+ /* Program T-INIT master registers */
+ for_each_dsi_port(port, intel_dsi->ports) {
+ tmp = I915_READ(ICL_DSI_T_INIT_MASTER(port));
+ tmp &= ~MASTER_INIT_TIMER_MASK;
+ tmp |= intel_dsi->init_count;
+ I915_WRITE(ICL_DSI_T_INIT_MASTER(port), tmp);
+ }
+}
+
static void gen11_dsi_enable_port_and_phy(struct intel_encoder *encoder)
{
/* step 4a: power up all lanes of the DDI used by DSI */
@@ -283,6 +299,9 @@ static void gen11_dsi_enable_port_and_phy(struct intel_encoder *encoder)
/* step 4d: enable DDI buffer */
gen11_dsi_enable_ddi_buffer(encoder);
+
+ /* step 4e: setup D-PHY timings */
+ gen11_dsi_setup_dphy_timings(encoder);
}
static void __attribute__((unused))
--
2.7.4
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