[Intel-gfx] ✗ Fi.CI.BAT: failure for ICELAKE DSI DRIVER (rev3)

[Patchwork]

== Series Details ==

Series: ICELAKE DSI DRIVER (rev3)
URL   : https://patchwork.freedesktop.org/series/44823/
State : failure

== Summary ==

= CI Bug Log - changes from CI_DRM_4432 -> Patchwork_9538 =

== Summary - FAILURE ==

  Serious unknown changes coming with Patchwork_9538 absolutely need to be
  verified manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in Patchwork_9538, please notify your bug team to allow them
  to document this new failure mode, which will reduce false positives in CI.

  External URL: https://patchwork.freedesktop.org/api/1.0/series/44823/revisions/3/mbox/

== Possible new issues ==

  Here are the unknown changes that may have been introduced in Patchwork_9538:

  === IGT changes ===

    ==== Possible regressions ====

    igt at drv_selftest@live_hangcheck:
      fi-byt-n2820:       PASS -> DMESG-FAIL

    igt at drv_selftest@mock_scatterlist:
      fi-snb-2520m:       NOTRUN -> DMESG-WARN
      {fi-cfl-8109u}:     NOTRUN -> DMESG-WARN

    
    ==== Warnings ====

    igt at drv_selftest@live_gtt:
      fi-cfl-8700k:       INCOMPLETE -> FAIL
      fi-skl-6260u:       FAIL (fdo#105347) -> INCOMPLETE

    
== Known issues ==

  Here are the changes found in Patchwork_9538 that come from known issues:

  === IGT changes ===

    ==== Issues hit ====

    igt at drv_selftest@live_gtt:
      fi-kbl-7567u:       PASS -> FAIL (fdo#105347)

    igt at kms_flip@basic-flip-vs-dpms:
      fi-skl-6700hq:      PASS -> DMESG-WARN (fdo#105998)

    
    ==== Possible fixes ====

    igt at drv_selftest@live_gtt:
      fi-whl-u:           INCOMPLETE -> PASS
      fi-skl-gvtdvm:      FAIL (fdo#105347) -> PASS

    igt at drv_selftest@live_requests:
      fi-gdg-551:         DMESG-FAIL -> PASS

    igt at gem_exec_suspend@basic-s3:
      {fi-cfl-8109u}:     INCOMPLETE -> PASS

    igt at kms_frontbuffer_tracking@basic:
      fi-hsw-peppy:       DMESG-FAIL (fdo#106103, fdo#102614) -> PASS

    igt at kms_pipe_crc_basic@suspend-read-crc-pipe-b:
      fi-snb-2520m:       INCOMPLETE (fdo#103713) -> PASS

    
    ==== Warnings ====

    igt at drv_selftest@live_gtt:
      fi-kbl-r:           INCOMPLETE -> FAIL (fdo#105347)

    
  {name}: This element is suppressed. This means it is ignored when computing
          the status of the difference (SUCCESS, WARNING, or FAILURE).

  fdo#102614 https://bugs.freedesktop.org/show_bug.cgi?id=102614
  fdo#103713 https://bugs.freedesktop.org/show_bug.cgi?id=103713
  fdo#105347 https://bugs.freedesktop.org/show_bug.cgi?id=105347
  fdo#105998 https://bugs.freedesktop.org/show_bug.cgi?id=105998
  fdo#106103 https://bugs.freedesktop.org/show_bug.cgi?id=106103


== Participating hosts (47 -> 40) ==

  Missing    (7): fi-ilk-m540 fi-hsw-4200u fi-byt-j1900 fi-skl-guc fi-byt-squawks fi-bsw-cyan fi-ctg-p8600 


== Build changes ==

    * Linux: CI_DRM_4432 -> Patchwork_9538

  CI_DRM_4432: a85ef996ecfe00a03c51e427cb15a0cb0a2eda82 @ git://anongit.freedesktop.org/gfx-ci/linux
  IGT_4538: 9b3f41a6c6da7d767516a93dccf17469a551e942 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
  Patchwork_9538: 10c6389e48e2069a55e2466f45c8a6ec788cd7fc @ git://anongit.freedesktop.org/gfx-ci/linux


== Linux commits ==

10c6389e48e2 drm/i915/icl: Configure DSI transcoders
bf595a2d4a1d drm/i915/icl: Define TRANS_DSI_FUNC_CONF register
7177c61bab6c drm/i915/icl: Add macros for MMIO of DSI transcoder registers
8d034248b3cc drm/i915/icl: Get DSI transcoder for a given port
8b049558aeab drm/i915/icl: Program TA_TIMING_PARAM registers
b2eb5797678e drm/i915/icl: Define TA_TIMING_PARAM registers
8deca2701ef1 drm/i915/icl: Program DSI clock and data lane timing params
231b77006a87 drm/i915/icl: Define data/clock lanes dphy timing registers
e3758da591c4 drm/i915/icl: Program T_INIT_MASTER registers
aeb82703e447 drm/i915/icl: Define T_INIT_MASTER registers
62a43c99fbac drm/i915/icl: Enable DDI Buffer
7a8587c98089 drm/i915/icl: DSI vswing programming sequence
b49066be1b42 drm/i915/icl: Configure lane sequencing of combo phy transmitter
6f7275ce61cf drm/i915/icl: Define AUX lane registers for Port A/B
e56e95213123 drm/i915/icl: Power down unused DSI lanes
f481e14c3ae3 drm/i915/icl: Define PORT_CL_DW_10 register
2a7cad95c84a drm/i915/icl: Enable DSI IO power
a958e5547518 drm/i915/icl: Define DSI mode ctl register
d3c59eb33fa4 drm/i915/icl: Program DSI Escape clock Divider
232e4a2d6a15 drm/i915/icl: Define register for DSI PLL

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_9538/issues.html