[Intel-gfx] [PATCH 2/2] drm/i915/selftests: Fixup missing MI_MEM_VIRTUAL for live_hangcheck
Ville Syrjälä
ville.syrjala at linux.intel.com
Fri Jul 6 14:47:43 UTC 2018
On Fri, Jul 06, 2018 at 03:23:23PM +0100, Chris Wilson wrote:
> We always want to use a virtual address (i.e. use the GTT) for
> MI_STORE_DWORD_IMM, but forgot the ever so important flag in
> live_hangcheck for gen3.
Reviewed-by: Ville Syrjälä <ville.syrjala at linux.intel.com>
>
> Signed-off-by: Chris Wilson <chris at chris-wilson.co.uk>
> ---
> drivers/gpu/drm/i915/selftests/intel_hangcheck.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/selftests/intel_hangcheck.c b/drivers/gpu/drm/i915/selftests/intel_hangcheck.c
> index 0fc6da81f86e..c838f7d08cb9 100644
> --- a/drivers/gpu/drm/i915/selftests/intel_hangcheck.c
> +++ b/drivers/gpu/drm/i915/selftests/intel_hangcheck.c
> @@ -184,7 +184,7 @@ static int emit_recurse_batch(struct hang *h,
> *batch++ = MI_BATCH_BUFFER_START | 2 << 6;
> *batch++ = lower_32_bits(vma->node.start);
> } else {
> - *batch++ = MI_STORE_DWORD_IMM;
> + *batch++ = MI_STORE_DWORD_IMM | MI_MEM_VIRTUAL;
> *batch++ = lower_32_bits(hws_address(hws, rq));
> *batch++ = rq->fence.seqno;
> *batch++ = MI_ARB_CHECK;
> --
> 2.18.0
>
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--
Ville Syrjälä
Intel
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