[Intel-gfx] [PATCH] drm/i915/selftests: Magic numbers for old Y-tiling

[Mika Kuoppala]

Chris Wilson <chris at chris-wilson.co.uk> writes:

> i915g has a slightly different tiling layout, and so requires a
> different reference swizzle pattern.
>
> Testcase: igt/drv_selftests/live_objects #gdg
> Signed-off-by: Chris Wilson <chris at chris-wilson.co.uk>

Acked-by: Mika Kuoppala <mika.kuoppala at linux.intel.com>

> ---
>  drivers/gpu/drm/i915/selftests/i915_gem_object.c | 11 +++++++++--
>  1 file changed, 9 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/selftests/i915_gem_object.c b/drivers/gpu/drm/i915/selftests/i915_gem_object.c
> index 25c2b2d433bd..f4a5099c75b5 100644
> --- a/drivers/gpu/drm/i915/selftests/i915_gem_object.c
> +++ b/drivers/gpu/drm/i915/selftests/i915_gem_object.c
> @@ -169,9 +169,16 @@ static u64 tiled_offset(const struct tile *tile, u64 v)
>  		v += y * tile->width;
>  		v += div64_u64_rem(x, tile->width, &x) << tile->size;
>  		v += x;
> -	} else {
> +	} else if (tile->width == 128) {
>  		const unsigned int ytile_span = 16;
> -		const unsigned int ytile_height = 32 * ytile_span;
> +		const unsigned int ytile_height = 512;
> +
> +		v += y * ytile_span;
> +		v += div64_u64_rem(x, ytile_span, &x) * ytile_height;
> +		v += x;
> +	} else {
> +		const unsigned int ytile_span = 32;
> +		const unsigned int ytile_height = 256;
>  
>  		v += y * ytile_span;
>  		v += div64_u64_rem(x, ytile_span, &x) * ytile_height;
> -- 
> 2.18.0
>
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