[Intel-gfx] [PATCH 2/3] drm/i915/guc: Move the pin bias value from GuC to GGTT

[Chris Wilson]

Quoting Jakub Bartmiński (2018-07-17 12:55:59)
> @@ -5490,6 +5486,10 @@ int i915_gem_init(struct drm_i915_private *dev_priv)
>                 goto err_unlock;
>         }
>  
> +       ret = intel_wopcm_init(&dev_priv->wopcm);
> +       if (ret)
> +               goto err_uc_misc;

Hmm. are you sure about the unwind? Looks like it should be err_ggtt.

For science, I would suggest putting a couple of i915_inject_fault()
around the wopcm_init() paths.

> diff --git a/drivers/gpu/drm/i915/i915_gem_context.c b/drivers/gpu/drm/i915/i915_gem_context.c
> index b10770cfccd2..32f96b8cd9c4 100644
> --- a/drivers/gpu/drm/i915/i915_gem_context.c
> +++ b/drivers/gpu/drm/i915/i915_gem_context.c
> @@ -329,15 +329,7 @@ __create_hw_context(struct drm_i915_private *dev_priv,
>         ctx->desc_template =
>                 default_desc_template(dev_priv, dev_priv->mm.aliasing_ppgtt);
>  
> -       /*
> -        * GuC requires the ring to be placed in Non-WOPCM memory. If GuC is not
> -        * present or not in use we still need a small bias as ring wraparound
> -        * at offset 0 sometimes hangs. No idea why.
> -        */
> -       if (USES_GUC(dev_priv))
> -               ctx->ggtt_offset_bias = dev_priv->guc.ggtt_pin_bias;
> -       else
> -               ctx->ggtt_offset_bias = I915_GTT_PAGE_SIZE;
> +       ctx->ggtt_offset_bias = dev_priv->ggtt.pin_bias;

We could probably also remove it from ctx now (in a later patch).

> -static void wopcm_init_guc_ggtt_pin_bias(struct intel_wopcm *wopcm)
> +static void wopcm_init_ggtt_pin_bias(struct intel_wopcm *wopcm)
>  {
>         struct drm_i915_private *i915 = wopcm_to_i915(wopcm);
>  
>         GEM_BUG_ON(!wopcm->size);
>         GEM_BUG_ON(wopcm->size < wopcm->guc.base);
>  
> -       i915->guc.ggtt_pin_bias = wopcm->size - wopcm->guc.base;
> +       i915->ggtt.pin_bias = wopcm->size - wopcm->guc.base;

For safety,
	i915->ggtt.pin_bias = max(i915->gtt.pin_bias,
				  wopcm->size - wopcm->guc.base);

> @@ -224,7 +225,7 @@ int intel_wopcm_init(struct intel_wopcm *wopcm)
>         wopcm->guc.base = guc_wopcm_base;
>         wopcm->guc.size = guc_wopcm_size;
>  
> -       wopcm_init_guc_ggtt_pin_bias(wopcm);
> +       wopcm_init_ggtt_pin_bias(wopcm);
>  
>         return 0;
>  }
> diff --git a/drivers/gpu/drm/i915/selftests/mock_gtt.c b/drivers/gpu/drm/i915/selftests/mock_gtt.c
> index a140ea5c3a7c..3afff10e94d9 100644
> --- a/drivers/gpu/drm/i915/selftests/mock_gtt.c
> +++ b/drivers/gpu/drm/i915/selftests/mock_gtt.c
> @@ -117,6 +117,8 @@ void mock_init_ggtt(struct drm_i915_private *i915)
>         ggtt->vm.vma_ops.set_pages   = ggtt_set_pages;
>         ggtt->vm.vma_ops.clear_pages = clear_pages;
>  
> +       ggtt->pin_bias = I915_GTT_PAGE_SIZE;

For mocking, we can leave it at zero (I think we don't assert that
PIN_OFFSET_BIAS can't be zero).
-Chris