[Intel-gfx] [PATCH 1/2] drm/i915/gtt: Enable full-ppgtt by default everywhere

Kenneth Graunke kenneth at whitecape.org
Tue Jul 17 20:02:33 UTC 2018


On Tuesday, July 17, 2018 2:57:50 AM PDT Chris Wilson wrote:
> We should we have all the kinks worked out and full-ppgtt now works
> reliably on gen7 (Ivybridge, Valleyview/Baytrail and Haswell). If we can
> let userspace have full control over their own ppgtt, it makes softpinning
> far more effective, in turn making GPU dispatch far more efficient by
> virtue of better mm segregation.  On the other hand, switching over to a
> different GTT for every client does incur noticeable overhead, but only
> for very lightweight tasks.
> 
> Signed-off-by: Chris Wilson <chris at chris-wilson.co.uk>
> Cc: Joonas Lahtinen <joonas.lahtinen at linux.intel.com>
> Cc: Mika Kuoppala <mika.kuoppala at linux.intel.com>
> Cc: Matthew Auld <matthew.william.auld at gmail.com>
> Reviewed-by: Joonas Lahtinen <joonas.lahtinen at linux.intel.com>
> Cc: Jason Ekstrand <jason.ekstrand at intel.com>
> Cc: Kenneth Graunke <kenneth at whitecape.org>
> ---
>  drivers/gpu/drm/i915/i915_gem_gtt.c | 10 ++++------
>  1 file changed, 4 insertions(+), 6 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c b/drivers/gpu/drm/i915/i915_gem_gtt.c
> index f00c7fbef79e..9bad73332ce7 100644
> --- a/drivers/gpu/drm/i915/i915_gem_gtt.c
> +++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
> @@ -179,13 +179,11 @@ int intel_sanitize_enable_ppgtt(struct drm_i915_private *dev_priv,
>  		return 0;
>  	}
>  
> -	if (HAS_LOGICAL_RING_CONTEXTS(dev_priv)) {
> -		if (has_full_48bit_ppgtt)
> -			return 3;
> +	if (has_full_48bit_ppgtt)
> +		return 3;
>  
> -		if (has_full_ppgtt)
> -			return 2;
> -	}
> +	if (has_full_ppgtt)
> +		return 2;
>  
>  	return 1;
>  }
> 

I'm very glad to see this land, PPGTT is really important for security.
It may also enable us to do more interesting things on Gen7.x.

Acked-by: Kenneth Graunke <kenneth at whitecape.org>
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