[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [1/4] drm/i915/icl: Add VIDEO_DIP regsiters

[Patchwork]

== Series Details ==

Series: series starting with [1/4] drm/i915/icl: Add VIDEO_DIP regsiters
URL   : https://patchwork.freedesktop.org/series/46742/
State : warning

== Summary ==

$ dim checkpatch origin/drm-tip
0ccb8db4366a drm/i915/icl: Add VIDEO_DIP regsiters
-:66: WARNING:LONG_LINE: line over 100 characters
#66: FILE: drivers/gpu/drm/i915/i915_reg.h:7873:
+#define ICL_VIDEO_DIP_PPS_DATA(trans, i)	_MMIO_TRANS2(trans, _ICL_VIDEO_DIP_PPS_DATA_A + (i) * 4)

-:67: WARNING:LONG_LINE: line over 100 characters
#67: FILE: drivers/gpu/drm/i915/i915_reg.h:7874:
+#define ICL_VIDEO_DIP_PPS_ECC(trans, i)		_MMIO_TRANS2(trans, _ICL_VIDEO_DIP_PPS_ECC_A + (i) * 4)

total: 0 errors, 2 warnings, 0 checks, 41 lines checked
f7a62fccc3eb i915/dp/dsc: Add DSC PPS register definitions
f6a9fee4d495 i915/dp/dsc: Add Rate Control Buffer Threshold Registers
-:82: CHECK:LINE_SPACING: Please don't use multiple blank lines
#82: FILE: drivers/gpu/drm/i915/i915_reg.h:10553:
+
+

total: 0 errors, 0 warnings, 1 checks, 56 lines checked
7ba6acbd53cb i915/dp/dsc: Add Rate Control Range Parameter Registers