[Intel-gfx] [PATCH 1/2] drm/dp: add extended receiver capability field present bit
Rodrigo Vivi
rodrigo.vivi at intel.com
Tue Jul 24 16:29:32 UTC 2018
On Mon, Jul 23, 2018 at 02:27:34PM -0700, matthew.s.atwood at intel.com wrote:
> From: Matt Atwood <matthew.s.atwood at intel.com>
>
> This bit was added to DP Training Aux RD interval with DP 1.3. Via
> descriptiion of the spec this field indicates the panels true
> capabilities are described in DPCD address space 02200h through 022FFh.
>
> v2: version comment update
> v3: version comment correction, commit message update
> v4: white space correction
I'm afraid the wrong space that I had mentioned it is still there
s/"(1 << 7)/* DP 1.3 */"/"(1 << 7) /* DP 1.3 *"/g
>
> Signed-off-by: Matt Atwood <matthew.s.atwood at intel.com>
> ---
> include/drm/drm_dp_helper.h | 5 +++--
> 1 file changed, 3 insertions(+), 2 deletions(-)
>
> diff --git a/include/drm/drm_dp_helper.h b/include/drm/drm_dp_helper.h
> index c01564991a9f..44aaefdc8448 100644
> --- a/include/drm/drm_dp_helper.h
> +++ b/include/drm/drm_dp_helper.h
> @@ -123,8 +123,9 @@
> # define DP_FRAMING_CHANGE_CAP (1 << 1)
> # define DP_DPCD_DISPLAY_CONTROL_CAPABLE (1 << 3) /* edp v1.2 or higher */
>
> -#define DP_TRAINING_AUX_RD_INTERVAL 0x00e /* XXX 1.2? */
> -# define DP_TRAINING_AUX_RD_MASK 0x7F /* XXX 1.2? */
> +#define DP_TRAINING_AUX_RD_INTERVAL 0x00e /* XXX 1.2? */
> +# define DP_TRAINING_AUX_RD_MASK 0x7F /* DP 1.3 */
> +# define DP_EXTENDED_RECEIVER_CAP_FIELD_PRESENT (1 << 7)/* DP 1.3 */
^ here
>
> #define DP_ADAPTER_CAP 0x00f /* 1.2 */
> # define DP_FORCE_LOAD_SENSE_CAP (1 << 0)
> --
> 2.17.1
>
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