[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/2] drm/i915/icl: Implement HSDIV_RATIO of MG_CLKTOP2_HSCLKCTL_PORT reg as separate divider value defines

Patchwork patchwork at emeril.freedesktop.org
Fri Jul 27 22:25:32 UTC 2018


== Series Details ==

Series: series starting with [1/2] drm/i915/icl: Implement HSDIV_RATIO of MG_CLKTOP2_HSCLKCTL_PORT reg as separate divider value defines
URL   : https://patchwork.freedesktop.org/series/47368/
State : success

== Summary ==

= CI Bug Log - changes from CI_DRM_4568 -> Patchwork_9798 =

== Summary - SUCCESS ==

  No regressions found.

  External URL: https://patchwork.freedesktop.org/api/1.0/series/47368/revisions/1/mbox/

== Known issues ==

  Here are the changes found in Patchwork_9798 that come from known issues:

  === IGT changes ===

    ==== Possible fixes ====

    igt at drv_selftest@live_workarounds:
      fi-cfl-8700k:       DMESG-FAIL (fdo#107292) -> PASS

    
    ==== Warnings ====

    {igt at kms_psr@primary_page_flip}:
      fi-cnl-psr:         DMESG-WARN (fdo#107372) -> DMESG-FAIL (fdo#107372)

    
  {name}: This element is suppressed. This means it is ignored when computing
          the status of the difference (SUCCESS, WARNING, or FAILURE).

  fdo#107292 https://bugs.freedesktop.org/show_bug.cgi?id=107292
  fdo#107372 https://bugs.freedesktop.org/show_bug.cgi?id=107372


== Participating hosts (52 -> 46) ==

  Missing    (6): fi-ilk-m540 fi-hsw-4200u fi-byt-squawks fi-bsw-cyan fi-ctg-p8600 fi-byt-clapper 


== Build changes ==

    * Linux: CI_DRM_4568 -> Patchwork_9798

  CI_DRM_4568: f679d412a2fad0988a8e7335942fd9fb47d323b8 @ git://anongit.freedesktop.org/gfx-ci/linux
  IGT_4580: f1c868dae24056ebc27e4f3c197724ce9b956a8a @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
  Patchwork_9798: ccc91452f663059fde0b9ecdaf8d70d38ac3bb4a @ git://anongit.freedesktop.org/gfx-ci/linux


== Linux commits ==

ccc91452f663 drm/i915/icl: Get DDI clock for ICL for MG PLL and TBT PLL
2775367376cc drm/i915/icl: Implement HSDIV_RATIO of MG_CLKTOP2_HSCLKCTL_PORT reg as separate divider value defines

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_9798/issues.html


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