[Intel-gfx] [PATCH] drm/i915: Downgrade Gen9 Plane WM latency error

[Chris Wilson]

Quoting Chris Wilson (2018-07-26 17:15:27)
> According to intel_read_wm_latency() it is perfectly legal for one WM
> and all subsequent levels to be 0 (and the deeper powersaving states
> disabled), so don't shout *ERROR*, over and over again.
> 
> Signed-off-by: Chris Wilson <chris at chris-wilson.co.uk>
> Cc: Maarten Lankhorst <maarten.lankhorst at linux.intel.com>
> Cc: Ville Syrjala <ville.syrjala at linux.intel.com>

From irc,
Acked-by: Maarten Lankhorst <maarten.lankhorst at linux.intel.com>
-Chris