[Intel-gfx] [PATCH] Revert "drm/i915/icl: WaEnableFloatBlendOptimization"

Chris Wilson chris at chris-wilson.co.uk
Mon Jul 30 12:16:03 UTC 2018


Quoting Mika Kuoppala (2018-07-30 13:06:36)
> The register for 0xe420 is unable to hold any value, including
> this bit. The documentation is also mixed between having a
> register bit for toggle and having a state command setup
> for it. Apparently the register toggle is deprecated.
> 
> Remove the register toggle as evidence shows it's futile.
> 
> The thing remaining is an apology and humble request for
> Mesa folks to resurrect their state setup for this as they
> were on right track from start.
> 
> This reverts commit 0bf059f3532bb39c52d917142206a8554fc2f1c5.
> 
> Fixes: 0bf059f3532b ("drm/i915/icl: WaEnableFloatBlendOptimization")
> References: HSDES#1406393558
> Cc: Oscar Mateo <oscar.mateo at intel.com>
> Cc: Anuj Phogat <anuj.phogat at gmail.com>
> Cc: Chris Wilson <chris at chris-wilson.co.uk>
> Cc: Lionel Landwerlin <lionel.g.landwerlin at intel.com>
> Signed-off-by: Mika Kuoppala <mika.kuoppala at linux.intel.com>

Acked-by: Chris Wilson <chris at chris-wilson.co.uk>

The test results do confirm the register is a red herring, but we need
someone to confirm that we aren't just using the wrong register etc.
-Chris


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