[Intel-gfx] ✓ Fi.CI.BAT: success for Enable Display Stream Compression on eDP/DP (rev2)

Patchwork patchwork at emeril.freedesktop.org
Tue Jul 31 18:07:09 UTC 2018


== Series Details ==

Series: Enable Display Stream Compression on eDP/DP (rev2)
URL   : https://patchwork.freedesktop.org/series/47461/
State : success

== Summary ==

= CI Bug Log - changes from CI_DRM_4599 -> Patchwork_9820 =

== Summary - SUCCESS ==

  No regressions found.

  External URL: https://patchwork.freedesktop.org/api/1.0/series/47461/revisions/2/mbox/

== Possible new issues ==

  Here are the unknown changes that may have been introduced in Patchwork_9820:

  === IGT changes ===

    ==== Possible regressions ====

    igt at drv_selftest@live_coherency:
      {fi-icl-u}:         PASS -> DMESG-FAIL

    
== Known issues ==

  Here are the changes found in Patchwork_9820 that come from known issues:

  === IGT changes ===

    ==== Issues hit ====

    igt at drv_module_reload@basic-reload-inject:
      fi-hsw-4770r:       PASS -> DMESG-WARN (fdo#107425)

    igt at gem_exec_suspend@basic-s4-devices:
      fi-kbl-7500u:       PASS -> DMESG-WARN (fdo#107139, fdo#105128)

    igt at prime_vgem@basic-fence-flip:
      fi-ilk-650:         PASS -> FAIL (fdo#104008)

    
    ==== Possible fixes ====

    igt at drv_selftest@live_workarounds:
      {fi-cfl-8109u}:     DMESG-FAIL (fdo#107292) -> PASS

    igt at kms_flip@basic-flip-vs-modeset:
      fi-skl-6700hq:      DMESG-WARN (fdo#105998) -> PASS

    igt at kms_pipe_crc_basic@suspend-read-crc-pipe-b:
      fi-snb-2520m:       INCOMPLETE (fdo#103713) -> PASS

    
    ==== Warnings ====

    {igt at kms_psr@primary_page_flip}:
      fi-cnl-psr:         DMESG-WARN (fdo#107372) -> DMESG-FAIL (fdo#107372)

    
  {name}: This element is suppressed. This means it is ignored when computing
          the status of the difference (SUCCESS, WARNING, or FAILURE).

  fdo#103713 https://bugs.freedesktop.org/show_bug.cgi?id=103713
  fdo#104008 https://bugs.freedesktop.org/show_bug.cgi?id=104008
  fdo#105128 https://bugs.freedesktop.org/show_bug.cgi?id=105128
  fdo#105998 https://bugs.freedesktop.org/show_bug.cgi?id=105998
  fdo#107139 https://bugs.freedesktop.org/show_bug.cgi?id=107139
  fdo#107292 https://bugs.freedesktop.org/show_bug.cgi?id=107292
  fdo#107372 https://bugs.freedesktop.org/show_bug.cgi?id=107372
  fdo#107425 https://bugs.freedesktop.org/show_bug.cgi?id=107425


== Participating hosts (50 -> 46) ==

  Additional (1): fi-gdg-551 
  Missing    (5): fi-ctg-p8600 fi-ilk-m540 fi-byt-squawks fi-byt-clapper fi-hsw-4200u 


== Build changes ==

    * Linux: CI_DRM_4599 -> Patchwork_9820

  CI_DRM_4599: 64f0c5b2bf42d83cab790c4607d08d06a9e50e82 @ git://anongit.freedesktop.org/gfx-ci/linux
  IGT_4581: f1c868dae24056ebc27e4f3c197724ce9b956a8a @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
  Patchwork_9820: c518575b081fdc62af71f4a8dd8f51d6e74b0527 @ git://anongit.freedesktop.org/gfx-ci/linux


== Linux commits ==

c518575b081f drm/i915/dp: Disable DSC in source by disabling DSS CTL bits
93dd5a51c49a drm/i915/dp: Configure Display stream splitter registers during DSC enable
74c50a243b19 drm/i915/icl: Add Display Stream Splitter control registers
3e5086ab7ce0 drm/i915/dp: Populate DSC PPS SDP and send PPS infoframes
2fb6aeab6aeb drm/i915/dp: Use the existing write_infoframe() for DSC PPS SDPs
363456f7ee95 drm/i915/dp: Configure i915 Picture parameter Set registers during DSC enabling
aa794586ed2a drm/i915/dp: Enable/Disable DSC in DP Sink
019eec0259af drm/i915/dsc: Compute Rate Control parameters for DSC
e1de0bb838ae drm/i915/dsc: Define & Compute VESA DSC params
296fd9b47516 drm/dsc: Define the DSC 1.1 and 1.2 Line Buffer depth constants
ea64a4506689 drm/i915/dp: Do not enable PSR2 if DSC is enabled
797cfde71a78 drm/i915/dp: Compute DSC pipe config in atomic check
aa96679ec57e drm/i915/dp: Add DSC params and DSC config to intel_crtc_state
411f986ec2b2 drm/dsc: Add helpers for DSC picture parameter set infoframes
d93be48c680f drm/dsc: Define Rate Control values that do not change over configurations
dfce08e3cd4a drm/dsc: Define VESA Display Stream Compression Capabilities
4e91c7ad5834 drm/dsc: Define Display Stream Compression PPS infoframe
518d81d5eff2 drm/dp: Define payload size for DP SDP PPS packet
aead51650cbe drm/i915/dp: Validate modes using max Output BPP and slice count when DSC supported
08e091309edb drm/i915/dp: Add helpers for Compressed BPP and Slice Count for DSC
0081fe19d05d drm/dp: DRM DP helper/macros to get DP sink DSC parameters
5c8ad85804c4 drm/i915/dp: Cache the DP/eDP DSC DPCD register set on Hotplug/eDP Init
27c39427ec85 drm/dp: Add DP DSC DPCD receiver capability size define and missing SHIFT

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_9820/issues.html


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