[Intel-gfx] [PATCH v2 2/2] drm/i915/perf: fix ctx_id read with GuC & ICL

[Michel Thierry]

On 6/1/2018 10:08 AM, Lionel Landwerlin wrote:
> On 01/06/18 16:18, Chris Wilson wrote:
>> Quoting Lionel Landwerlin (2018-06-01 10:52:15)
>>> +                       /*
>>> +                        * The LRCA is aligned to a page. As a result the
>>> +                        * lower 12bits are always at 0 and reused in the
>>> +                        * context descriptor for some flags. They won't be
>>> +                        * part of the context ID in the OA reports, so squash
>>> +                        * those lower bits.
>>> +                        */
>>> +                       i915->perf.oa.specific_ctx_id =
>>> +                               (lrca + LRC_HEADER_PAGES * PAGE_SIZE) >> 12;
>> Hmm. I think what you want is lower_32_bits(ce->lrc_desc) as that is
>> what is being copied across.
> 
> Well, in that case, this is GuC filling this. It appears to strip the
> descriptor template :(

In this case 'lower_32_bits(ce->lrc_desc) >> 12' should be equivalent.

> 
>>
>>> +
>>> +                       /*
>>> +                        * GuC uses the top bit to signal proxy submission, so
>>> +                        * ignore that bit if using GuC.
>>> +                        */
>>> +                       i915->perf.oa.specific_ctx_id_mask =
>>> +                               (1U << (GEN8_CTX_ID_WIDTH - 1)) - 1;
>>> +               } else {
>>> +                       i915->perf.oa.specific_ctx_id = stream->ctx->hw_id;
>> Imagine a ce->hw_id :)
>>
>> Or for the time being ce->gem_context->hw_id;
>>
>> I think I'm arguing for returning intel_context from oa_get_render_lrca()
>> and not lrca, and deriving all the different ctx_id from the pinned ce.
>> -Chris
> 
> Fair,
> 
> -
> Lionel
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx at lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
>