[Intel-gfx] [PATCH 1/2] drm/i915/perf: use the lrc_desc to get the ctx hw id in gen8-10

Lionel Landwerlin lionel.g.landwerlin at intel.com
Mon Jun 4 23:11:09 UTC 2018


On 04/06/18 22:40, Michel Thierry wrote:
> The upper 32 bits of the lrc_desc (bits 52-32 to be precise) are the
> context hw id in GEN8-10, so use them and have one less thing to
> maintain in the unlikely case we change the descriptor sw fields.
>
> Signed-off-by: Michel Thierry <michel.thierry at intel.com>
> Cc: Lionel Landwerlin <lionel.g.landwerlin at intel.com>
> Cc: Chris Wilson <chris at chris-wilson.co.uk>
> ---
>   drivers/gpu/drm/i915/i915_perf.c | 3 ++-
>   1 file changed, 2 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_perf.c b/drivers/gpu/drm/i915/i915_perf.c
> index a6c8d61add0c..36b6d64d6018 100644
> --- a/drivers/gpu/drm/i915/i915_perf.c
> +++ b/drivers/gpu/drm/i915/i915_perf.c
> @@ -1279,7 +1279,8 @@ static int oa_get_render_ctx_id(struct i915_perf_stream *stream)
>   			i915->perf.oa.specific_ctx_id_mask =
>   				(1U << (GEN8_CTX_ID_WIDTH - 1)) - 1;
>   		} else {
> -			i915->perf.oa.specific_ctx_id = stream->ctx->hw_id;
> +			i915->perf.oa.specific_ctx_id =
> +				upper_32_bits(ce->lrc_desc);
>   			i915->perf.oa.specific_ctx_id_mask =
>   				(1U << GEN8_CTX_ID_WIDTH) - 1;
>   		}

I would do this :

i915->perf.oa.specific_ctx_id_mask = (1U << GEN8_CTX_ID_WIDTH) - 1;
i915->perf.oa.specific_ctx_id = upper_32_bits(ce->lrc_desc) & 
i915->perf.oa.specific_ctx_id_mask;

Same for Gen11.
I'm concerned otherwise we might get incorrect comparison in the 
gen8_append_oa_reports on the "reserved" bits.

Thanks,

-
Lionel



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