[Intel-gfx] [PATCH 01/17] drm/i915: Apply batch location restrictions before pinning

[Joonas Lahtinen]

Quoting Chris Wilson (2018-06-10 22:43:09)
> We special case the position of the batch within the GTT to prevent
> negative self-relocation deltas from underflowing. However, that
> restriction is being applied after a trial pin of the batch in its
> current position. Thus we are not rejecting an invalid location if the
> batch has been before, leading to an assertion if we happen to need to

"has been used/bound/pinned/whatever"?

> rearrange the entire payload. In the worst case, this may cause a GPU
> hang on gen7 or perhaps missing state.
> 
> References: https://bugs.freedesktop.org/show_bug.cgi?id=105720
> Fixes: 2889caa92321 ("drm/i915: Eliminate lots of iterations over the execobjects array")
> Signed-off-by: Chris Wilson <chris at chris-wilson.co.uk>
> Cc: Joonas Lahtinen <joonas.lahtinen at linux.intel.com>
> Cc: Martin Peres <martin.peres at linux.intel.com>

Reviewed-by: Joonas Lahtinen <joonas.lahtinen at linux.intel.com>

Regards, Joonas