[Intel-gfx] [PATCH v4 0/2] Enable Dynamic cdclk and HDA together on GLK
Abhay Kumar
abhay.kumar at intel.com
Tue Jun 12 21:58:45 UTC 2018
Patches needed to change cdclk to 2*BCLK before accessing HDA Codec.
Ville Syrjälä (2):
drm/i915: Force 2*96 MHz cdclk on glk/cnl when audio power is enabled
drm/i915: Shut off PW2 when changing cdclk on glk
drivers/gpu/drm/i915/i915_drv.h | 3 ++
drivers/gpu/drm/i915/i915_reg.h | 4 ++
drivers/gpu/drm/i915/intel_audio.c | 67 +++++++++++++++++++++++++++++++--
drivers/gpu/drm/i915/intel_cdclk.c | 43 +++++++++++----------
drivers/gpu/drm/i915/intel_display.c | 7 +++-
drivers/gpu/drm/i915/intel_drv.h | 7 ++++
drivers/gpu/drm/i915/intel_runtime_pm.c | 34 +++++++++++++++++
7 files changed, 140 insertions(+), 25 deletions(-)
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2.7.4
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