[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [CI,1/2] drm/i915/icl: Add allowed DP rates for Icelake

[Jani Nikula]

On Tue, 12 Jun 2018, Rodrigo Vivi <rodrigo.vivi at intel.com> wrote:
> Do we really want BIT everywhere?!

I think I'd go for everywhere except part of a register field value:

#define SINGLE_BIT_OKAY		BIT(25)
#define FIELD_SHIFT		20
#define FIELD_MASK		(0xf << 20)
#define FIELD_FOO_PLEASE_NO	BIT(20)		/* Don't do this */
#define FIELD_FOO		(1 << 20)	/* This is consistent */
#define FIELD_BAR		(2 << 20)
#define FIELD_BAZ		(3 << 20)


BR,
Jani.

-- 
Jani Nikula, Intel Open Source Graphics Center