[Intel-gfx] [PATCH v4 0/4] Enable Dynamic cdclk and HDA together on GLK

Abhay Kumar abhay.kumar at intel.com
Wed Jun 13 18:41:53 UTC 2018


Patches needed to change cdclk to 2*BCLK before accessing HDA Codec.

Ville Syrjälä (4):
  drm/i915: Force 2*96 MHz cdclk on glk/cnl when audio power is enabled
  drm/i915: Introduce for_each_intel_dp()
  drm/i915: Lock gmbus/aux mutexes while changing cdclk
  drm/i915: Shut off PW2 when changing cdclk on glk

 drivers/gpu/drm/i915/i915_drv.c         |  1 +
 drivers/gpu/drm/i915/i915_drv.h         |  3 ++
 drivers/gpu/drm/i915/i915_reg.h         |  4 ++
 drivers/gpu/drm/i915/intel_audio.c      | 67 ++++++++++++++++++++++++++++++--
 drivers/gpu/drm/i915/intel_cdclk.c      | 68 +++++++++++++++++++++++----------
 drivers/gpu/drm/i915/intel_display.c    |  7 +++-
 drivers/gpu/drm/i915/intel_display.h    |  4 ++
 drivers/gpu/drm/i915/intel_dp.c         | 38 ++++--------------
 drivers/gpu/drm/i915/intel_drv.h        | 21 ++++++++++
 drivers/gpu/drm/i915/intel_i2c.c        |  1 -
 drivers/gpu/drm/i915/intel_runtime_pm.c | 34 +++++++++++++++++
 11 files changed, 191 insertions(+), 57 deletions(-)

-- 
2.7.4



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