[Intel-gfx] [PATCH 1/2] drm/i915: Disallow interlaced modes on g4x DP outputs

[Ville Syrjälä]

On Thu, Jun 14, 2018 at 03:26:09PM +0300, Jani Nikula wrote:
> On Thu, 14 Jun 2018, Jani Nikula <jani.nikula at linux.intel.com> wrote:
> > On Wed, 13 Jun 2018, Ville Syrjala <ville.syrjala at linux.intel.com> wrote:
> >> From: Ville Syrjälä <ville.syrjala at linux.intel.com>
> >>
> >> Looks like interlaced DP output doesn't work on g4x either. Not all
> >> that surprising considering we already established that interlaced
> >> DP output is busted on VLV/CHV.
> >>
> >> Cc: stable at vger.kernel.org
> >> Signed-off-by: Ville Syrjälä <ville.syrjala at linux.intel.com>
> >
> > Reviewed-by: Jani Nikula <jani.nikula at intel.com>
> 
> Oh, did you have a bug reference?

No. Just noticed it on my own machine.

> 
> 
> >
> >
> >> ---
> >>  drivers/gpu/drm/i915/intel_dp.c | 4 ++--
> >>  1 file changed, 2 insertions(+), 2 deletions(-)
> >>
> >> diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
> >> index 40ffd9163175..6068986fd985 100644
> >> --- a/drivers/gpu/drm/i915/intel_dp.c
> >> +++ b/drivers/gpu/drm/i915/intel_dp.c
> >> @@ -1869,7 +1869,7 @@ intel_dp_compute_config(struct intel_encoder *encoder,
> >>  						conn_state->scaling_mode);
> >>  	}
> >>  
> >> -	if ((IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) &&
> >> +	if (HAS_GMCH_DISPLAY(dev_priv) &&
> >>  	    adjusted_mode->flags & DRM_MODE_FLAG_INTERLACE)
> >>  		return false;
> >>  
> >> @@ -6351,7 +6351,7 @@ intel_dp_init_connector(struct intel_digital_port *intel_dig_port,
> >>  	drm_connector_init(dev, connector, &intel_dp_connector_funcs, type);
> >>  	drm_connector_helper_add(connector, &intel_dp_connector_helper_funcs);
> >>  
> >> -	if (!IS_VALLEYVIEW(dev_priv) && !IS_CHERRYVIEW(dev_priv))
> >> +	if (!HAS_GMCH_DISPLAY(dev_priv))
> >>  		connector->interlace_allowed = true;
> >>  	connector->doublescan_allowed = 0;
> 
> -- 
> Jani Nikula, Intel Open Source Graphics Center

-- 
Ville Syrjälä
Intel