[Intel-gfx] ✓ Fi.CI.BAT: success for ICELAKE DSI DRIVER

[Patchwork]

== Series Details ==

Series: ICELAKE DSI DRIVER
URL   : https://patchwork.freedesktop.org/series/44823/
State : success

== Summary ==

= CI Bug Log - changes from CI_DRM_4323 -> Patchwork_9324 =

== Summary - WARNING ==

  Minor unknown changes coming with Patchwork_9324 need to be verified
  manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in Patchwork_9324, please notify your bug team to allow them
  to document this new failure mode, which will reduce false positives in CI.

  External URL: https://patchwork.freedesktop.org/api/1.0/series/44823/revisions/1/mbox/

== Possible new issues ==

  Here are the unknown changes that may have been introduced in Patchwork_9324:

  === IGT changes ===

    ==== Warnings ====

    igt at gem_exec_gttfill@basic:
      fi-pnv-d510:        PASS -> SKIP

    
== Known issues ==

  Here are the changes found in Patchwork_9324 that come from known issues:

  === IGT changes ===

    ==== Issues hit ====

    igt at kms_flip@basic-flip-vs-modeset:
      fi-glk-j4005:       PASS -> DMESG-WARN (fdo#106097, fdo#106000)

    igt at kms_pipe_crc_basic@hang-read-crc-pipe-b:
      fi-glk-j4005:       PASS -> DMESG-WARN (fdo#106238) +1

    
    ==== Possible fixes ====

    igt at kms_flip@basic-flip-vs-wf_vblank:
      fi-glk-j4005:       FAIL (fdo#100368) -> PASS

    igt at kms_flip@basic-plain-flip:
      fi-glk-j4005:       DMESG-WARN (fdo#106097) -> PASS

    
  fdo#100368 https://bugs.freedesktop.org/show_bug.cgi?id=100368
  fdo#106000 https://bugs.freedesktop.org/show_bug.cgi?id=106000
  fdo#106097 https://bugs.freedesktop.org/show_bug.cgi?id=106097
  fdo#106238 https://bugs.freedesktop.org/show_bug.cgi?id=106238


== Participating hosts (43 -> 38) ==

  Missing    (5): fi-ctg-p8600 fi-ilk-m540 fi-byt-squawks fi-bsw-cyan fi-hsw-4200u 


== Build changes ==

    * Linux: CI_DRM_4323 -> Patchwork_9324

  CI_DRM_4323: 25d3805133071406ffae77c994f464dbbb3bb34e @ git://anongit.freedesktop.org/gfx-ci/linux
  IGT_4519: 3381a56be31defb3b5c23a4fbc19ac26a000c35b @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
  Patchwork_9324: 93beeefce6e707b87e1fb545dc6c79f55dbe11dc @ git://anongit.freedesktop.org/gfx-ci/linux


== Linux commits ==

93beeefce6e7 drm/i915/icl: Configure DSI transcoders
a6e5e2fd35e0 drm/i915/icl: Define TRANS_DSI_FUNC_CONF register
8ec34fab7e4a drm/i915/icl: Add macros for MMIO of DSI transcoder registers
dc59f86128ed drm/i915/icl: Get DSI transcoder for a given port
f0613ae3d0c5 drm/i915/icl: Program TA_TIMING_PARAM registers
baa4e013e1cc drm/i915/icl: Define TA_TIMING_PARAM registers
0f1272e068f1 drm/i915/icl: Program DSI clock and data lane timing params
d55b00eb762f drm/i915/icl: Define data/clock lanes dphy timing registers
03cfa39b2778 drm/i915/icl: Program T_INIT_MASTER registers
1c8e8d05b24e drm/i915/icl: Define T_INIT_MASTER registers
cb25fce515b5 drm/i915/icl: Enable DDI Buffer
60ff8f5c139f drm/i915/icl: DSI vswing programming sequence
873188f7da58 drm/i915/icl: Configure lane sequencing of combo phy transmitter
ead6060f69a5 drm/i915/icl: Define AUX lane registers for Port A/B
159663d4b051 drm/i915/icl: Power down unused DSI lanes
cb9ea5efade8 drm/i915/icl: Define PORT_CL_DW_10 register
0c9ae5501a9c drm/i915/icl: Enable DSI IO power
377567cee3fb drm/i915/icl: Define DSI mode ctl register
034415bf480c drm/i915/icl: Program DSI Escape clock Divider
c891c2690e61 drm/i915/icl: Define register for DSI PLL

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_9324/issues.html