[Intel-gfx] [PATCH v5 1/2] drm/i915/gmbus: Increase the Bytes per Rd/Wr Op

[Ramalingam C]

Please ignore this series as I have pushed it again to it's original 
series itself. Sorry for the inconvenience.

https://patchwork.freedesktop.org/series/41632/

Thanks and Regards,
Ram


On Thursday 28 June 2018 06:18 PM, Ramalingam C wrote:
> GMBUS HW supports 511Bytes as Max Bytes per single RD/WR op. Instead of
> enabling the 511Bytes per RD/WR cycle on legacy platforms for no
> absolute ROIs, this change allows the max bytes per op upto 511Bytes
> from Gen9 onwards.
>
> v2:
>    No Change.
> v3:
>    Inline function for max_xfer_size and renaming of the macro.[Jani]
> v4:
>    Extra brackets removed [ville]
>    Commit msg is modified.
> v5:
>    Collecting the Reviewed-By received.
>
> Cc: Jani Nikula <jani.nikula at intel.com>
> Cc: Chris Wilson <chris at chris-wilson.co.uk>
> Signed-off-by: Ramalingam C <ramalingam.c at intel.com>
> Reviewed-by: Jani Nikula <jani.nikula at intel.com>
> ---
>   drivers/gpu/drm/i915/i915_reg.h  |  1 +
>   drivers/gpu/drm/i915/intel_i2c.c | 11 +++++++++--
>   2 files changed, 10 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
> index c30cfcd90754..7353ad447936 100644
> --- a/drivers/gpu/drm/i915/i915_reg.h
> +++ b/drivers/gpu/drm/i915/i915_reg.h
> @@ -3093,6 +3093,7 @@ enum i915_power_well_id {
>   #define   GMBUS_CYCLE_STOP	(4 << 25)
>   #define   GMBUS_BYTE_COUNT_SHIFT 16
>   #define   GMBUS_BYTE_COUNT_MAX   256U
> +#define   GEN9_GMBUS_BYTE_COUNT_MAX 511U
>   #define   GMBUS_SLAVE_INDEX_SHIFT 8
>   #define   GMBUS_SLAVE_ADDR_SHIFT 1
>   #define   GMBUS_SLAVE_READ	(1 << 0)
> diff --git a/drivers/gpu/drm/i915/intel_i2c.c b/drivers/gpu/drm/i915/intel_i2c.c
> index 97606c1be70d..82bb9c33ab1c 100644
> --- a/drivers/gpu/drm/i915/intel_i2c.c
> +++ b/drivers/gpu/drm/i915/intel_i2c.c
> @@ -361,6 +361,13 @@ gmbus_wait_idle(struct drm_i915_private *dev_priv)
>   	return ret;
>   }
>   
> +static inline
> +unsigned int gmbus_max_xfer_size(struct drm_i915_private *dev_priv)
> +{
> +	return INTEL_GEN(dev_priv) >= 9 ? GEN9_GMBUS_BYTE_COUNT_MAX :
> +	       GMBUS_BYTE_COUNT_MAX;
> +}
> +
>   static int
>   gmbus_xfer_read_chunk(struct drm_i915_private *dev_priv,
>   		      unsigned short addr, u8 *buf, unsigned int len,
> @@ -400,7 +407,7 @@ gmbus_xfer_read(struct drm_i915_private *dev_priv, struct i2c_msg *msg,
>   	int ret;
>   
>   	do {
> -		len = min(rx_size, GMBUS_BYTE_COUNT_MAX);
> +		len = min(rx_size, gmbus_max_xfer_size(dev_priv));
>   
>   		ret = gmbus_xfer_read_chunk(dev_priv, msg->addr,
>   					    buf, len, gmbus1_index);
> @@ -462,7 +469,7 @@ gmbus_xfer_write(struct drm_i915_private *dev_priv, struct i2c_msg *msg,
>   	int ret;
>   
>   	do {
> -		len = min(tx_size, GMBUS_BYTE_COUNT_MAX);
> +		len = min(tx_size, gmbus_max_xfer_size(dev_priv));
>   
>   		ret = gmbus_xfer_write_chunk(dev_priv, msg->addr, buf, len,
>   					     gmbus1_index);