[Intel-gfx] [PATCH v6 6/7] drm/i915: Expose RPCS (SSEU) configuration to userspace

Lionel Landwerlin lionel.g.landwerlin at intel.com
Thu May 24 11:01:48 UTC 2018


On 24/05/18 11:43, Tvrtko Ursulin wrote:
>
>>
>>>
>>>> +
>>>> +    /*
>>>> +     * Mask of slices to enable for the context. Valid values are 
>>>> a subset
>>>> +     * of the bitmask value returned for I915_PARAM_SLICE_MASK.
>>>> +     */
>>>> +    __u8 slice_mask;
>>>> +
>>>> +    /*
>>>> +     * Mask of subslices to enable for the context. Valid values 
>>>> are a
>>>> +     * subset of the bitmask value return by 
>>>> I915_PARAM_SUBSLICE_MASK.
>>>> +     */
>>>> +    __u8 subslice_mask;
>>>
>>> Is this future proof enough, say for Gen11?
>>
>> As far as I can see, this fits.
>> No objection to bump it to 16/32bits if you'd like.
>
> Feel like I've asked you this before, sorry - nothing in the future 
> will need per slice subslice mask?

As far as I can see this remains the same uniform subslice per slice 
programming style.
We could play it safe and put all the masks in 64bits in the uAPI.

What do you think?

>
> Regards,
>
> Tvrtko


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