[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: per context slice/subslice powergating (rev6)

Patchwork patchwork at emeril.freedesktop.org
Thu May 24 15:41:38 UTC 2018


== Series Details ==

Series: drm/i915: per context slice/subslice powergating (rev6)
URL   : https://patchwork.freedesktop.org/series/42285/
State : warning

== Summary ==

$ dim checkpatch origin/drm-tip
966969f546ac drm/i915: Program RPCS for Broadwell
eb3c2a521a10 drm/i915: Record the sseu configuration per-context & engine
16d9bb4e86fc drm/i915/perf: simplify configure all context function
763f9dc06a15 drm/i915/perf: reuse intel_lrc ctx regs macro
d099dffee67c drm/i915/perf: lock powergating configuration to default when active
957b375e185c drm/i915: Expose RPCS (SSEU) configuration to userspace
-:40: WARNING:COMMIT_LOG_LONG_LINE: Possible unwrapped commit description (prefer a maximum 75 chars per line)
#40: 
v2: Fix offset of CTX_R_PWR_CLK_STATE in intel_lr_context_set_sseu() (Lionel)

total: 0 errors, 1 warnings, 0 checks, 456 lines checked
9873e890b9cd drm/i915: add a sysfs entry to let users set sseu configs



More information about the Intel-gfx mailing list