[Intel-gfx] [PATCH 02/11] drm/i915/icl: WaEnableStateCacheRedirectToCS

Mika Kuoppala mika.kuoppala at linux.intel.com
Tue May 29 09:15:12 UTC 2018


Oscar Mateo <oscar.mateo at intel.com> writes:

> Redirects the state cache to the CS Command buffer section for
> performance reasons.
>
> v2: Rebased
> v3: Rebased on top of the WA refactoring
> v3: Added References (Mika)
>
> References: HSDES#1604325460
> Cc: Mika Kuoppala <mika.kuoppala at linux.intel.com>
> Signed-off-by: Oscar Mateo <oscar.mateo at intel.com>

Reviewed-by: Mika Kuoppala <mika.kuoppala at linux.intel.com>

> ---
>  drivers/gpu/drm/i915/i915_reg.h          | 1 +
>  drivers/gpu/drm/i915/intel_workarounds.c | 4 ++++
>  2 files changed, 5 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
> index 4eb159f..924b9a6 100644
> --- a/drivers/gpu/drm/i915/i915_reg.h
> +++ b/drivers/gpu/drm/i915/i915_reg.h
> @@ -7227,6 +7227,7 @@ enum {
>  #define  DISABLE_PIXEL_MASK_CAMMING		(1<<14)
>  
>  #define GEN9_SLICE_COMMON_ECO_CHICKEN1		_MMIO(0x731c)
> +#define   GEN11_STATE_CACHE_REDIRECT_TO_CS	(1 << 11)
>  
>  #define GEN7_L3SQCREG1				_MMIO(0xB010)
>  #define  VLV_B0_WA_L3SQCREG1_VALUE		0x00D30000
> diff --git a/drivers/gpu/drm/i915/intel_workarounds.c b/drivers/gpu/drm/i915/intel_workarounds.c
> index 04aa885..1d29803 100644
> --- a/drivers/gpu/drm/i915/intel_workarounds.c
> +++ b/drivers/gpu/drm/i915/intel_workarounds.c
> @@ -470,6 +470,10 @@ static int icl_ctx_workarounds_init(struct drm_i915_private *dev_priv)
>  		WA_SET_BIT_MASKED(GEN7_ROW_CHICKEN2,
>  				  GEN11_TDL_CLOCK_GATING_FIX_DISABLE);
>  
> +	/* WaEnableStateCacheRedirectToCS:icl */
> +	WA_SET_BIT_MASKED(GEN9_SLICE_COMMON_ECO_CHICKEN1,
> +			  GEN11_STATE_CACHE_REDIRECT_TO_CS);
> +
>  	return 0;
>  }
>  
> -- 
> 1.9.1


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