[Intel-gfx] [PATCH i-g-t 2/2] igt/gem_userptr: Check read-only mappings
Chris Wilson
chris at chris-wilson.co.uk
Wed May 30 21:51:27 UTC 2018
Setup a userptr object that only has a read-only mapping back to a file
store (memfd). Then attempt to write into that mapping using the GPU and
assert that those writes do not land (while also writing via a writable
userptr mapping into the same memfd to verify that the GPU is working!)
Signed-off-by: Chris Wilson <chris at chris-wilson.co.uk>
Cc: Tvrtko Ursulin <tvrtko.ursulin at intel.com>
Cc: Joonas Lahtinen <joonas.lahtinen at linux.intel.com>
---
configure.ac | 1 +
lib/ioctl_wrappers.c | 4 +-
lib/ioctl_wrappers.h | 4 +-
tests/Makefile.am | 4 +-
tests/gem_userptr_blits.c | 191 ++++++++++++++++++++++++++++++++++++++
5 files changed, 198 insertions(+), 6 deletions(-)
diff --git a/configure.ac b/configure.ac
index 2f6bc70ee..f5a059d6a 100644
--- a/configure.ac
+++ b/configure.ac
@@ -125,6 +125,7 @@ PKG_CHECK_MODULES(PCIACCESS, [pciaccess >= 0.10])
PKG_CHECK_MODULES(KMOD, [libkmod])
PKG_CHECK_MODULES(PROCPS, [libprocps])
PKG_CHECK_MODULES(LIBUNWIND, [libunwind])
+PKG_CHECK_MODULES(SSL, [openssl])
PKG_CHECK_MODULES(VALGRIND, [valgrind], [have_valgrind=yes], [have_valgrind=no])
if test x$have_valgrind = xyes; then
diff --git a/lib/ioctl_wrappers.c b/lib/ioctl_wrappers.c
index 79db44a8c..d5d2a4e4c 100644
--- a/lib/ioctl_wrappers.c
+++ b/lib/ioctl_wrappers.c
@@ -869,7 +869,7 @@ int gem_madvise(int fd, uint32_t handle, int state)
return madv.retained;
}
-int __gem_userptr(int fd, void *ptr, int size, int read_only, uint32_t flags, uint32_t *handle)
+int __gem_userptr(int fd, void *ptr, uint64_t size, int read_only, uint32_t flags, uint32_t *handle)
{
struct drm_i915_gem_userptr userptr;
@@ -898,7 +898,7 @@ int __gem_userptr(int fd, void *ptr, int size, int read_only, uint32_t flags, ui
*
* Returns userptr handle for the GEM object.
*/
-void gem_userptr(int fd, void *ptr, int size, int read_only, uint32_t flags, uint32_t *handle)
+void gem_userptr(int fd, void *ptr, uint64_t size, int read_only, uint32_t flags, uint32_t *handle)
{
igt_assert_eq(__gem_userptr(fd, ptr, size, read_only, flags, handle), 0);
}
diff --git a/lib/ioctl_wrappers.h b/lib/ioctl_wrappers.h
index b966f72c9..8e2cd380b 100644
--- a/lib/ioctl_wrappers.h
+++ b/lib/ioctl_wrappers.h
@@ -133,8 +133,8 @@ struct local_i915_gem_userptr {
#define LOCAL_I915_USERPTR_UNSYNCHRONIZED (1<<31)
uint32_t handle;
};
-void gem_userptr(int fd, void *ptr, int size, int read_only, uint32_t flags, uint32_t *handle);
-int __gem_userptr(int fd, void *ptr, int size, int read_only, uint32_t flags, uint32_t *handle);
+void gem_userptr(int fd, void *ptr, uint64_t size, int read_only, uint32_t flags, uint32_t *handle);
+int __gem_userptr(int fd, void *ptr, uint64_t size, int read_only, uint32_t flags, uint32_t *handle);
void gem_sw_finish(int fd, uint32_t handle);
diff --git a/tests/Makefile.am b/tests/Makefile.am
index f41ad5096..ba307b220 100644
--- a/tests/Makefile.am
+++ b/tests/Makefile.am
@@ -126,8 +126,8 @@ gem_tiled_swapping_CFLAGS = $(AM_CFLAGS) $(THREAD_CFLAGS)
gem_tiled_swapping_LDADD = $(LDADD) -lpthread
prime_self_import_CFLAGS = $(AM_CFLAGS) $(THREAD_CFLAGS)
prime_self_import_LDADD = $(LDADD) -lpthread
-gem_userptr_blits_CFLAGS = $(AM_CFLAGS) $(THREAD_CFLAGS)
-gem_userptr_blits_LDADD = $(LDADD) -lpthread
+gem_userptr_blits_CFLAGS = $(AM_CFLAGS) $(THREAD_CFLAGS) $(SSL_CFLAGS)
+gem_userptr_blits_LDADD = $(LDADD) $(SSL_LIBS) -lpthread
perf_pmu_LDADD = $(LDADD) $(top_builddir)/lib/libigt_perf.la
gem_eio_LDADD = $(LDADD) -lrt
diff --git a/tests/gem_userptr_blits.c b/tests/gem_userptr_blits.c
index 0c2bdf5b2..2bfba4f04 100644
--- a/tests/gem_userptr_blits.c
+++ b/tests/gem_userptr_blits.c
@@ -46,10 +46,13 @@
#include <sys/stat.h>
#include <sys/time.h>
#include <sys/mman.h>
+#include <openssl/sha.h>
#include <signal.h>
#include <pthread.h>
#include <time.h>
+#include <linux/memfd.h>
+
#include "drm.h"
#include "i915_drm.h"
@@ -1075,6 +1078,191 @@ static int test_dmabuf(void)
return 0;
}
+static int test_readonly(int i915)
+{
+ unsigned char orig[SHA_DIGEST_LENGTH];
+ uint64_t aperture_size;
+ uint32_t whandle, rhandle;
+ uint32_t sz, total;
+ void *pages, *space;
+ int memfd;
+
+ /*
+ * A small batch of pages; small enough to cheaply check for stray
+ * writes but large enough that we don't create too many VMA pointing
+ * back to this set from the large arena. The limit on total number
+ * of VMA for a process is 65,536 (at least on this kernel).
+ */
+ sz = 16 << 12;
+ memfd = memfd_create("pages", 0);
+ igt_require(memfd != -1);
+ igt_require(ftruncate(memfd, sz) == 0);
+
+ pages = mmap(NULL, sz, PROT_WRITE, MAP_SHARED, memfd, 0);
+ igt_assert(pages != MAP_FAILED);
+
+ igt_require(__gem_userptr(i915, pages, sz, true, userptr_flags, &rhandle) == 0);
+ gem_close(i915, rhandle);
+
+ gem_userptr(i915, pages, sz, false, userptr_flags, &whandle);
+
+ total = 2048ull << 20;
+ aperture_size = gem_aperture_size(i915) / 2;
+ if (aperture_size > total)
+ aperture_size = total;
+ total = total / sz * sz;
+ igt_info("Using a %'dB (%'d pages) arena onto %d pages\n",
+ total, total >> 12, sz >> 12);
+
+ /* Create an arena all pointing to the same set of pages */
+ space = mmap(NULL, total, PROT_READ, MAP_ANON | MAP_SHARED, -1, 0);
+ igt_require(space != MAP_FAILED);
+ for (uint32_t offset = 0; offset < total; offset += sz) {
+ igt_assert(mmap(space + offset, sz,
+ PROT_WRITE, MAP_SHARED | MAP_FIXED,
+ memfd, 0) != MAP_FAILED);
+ *(uint32_t *)(space + offset) = offset;
+ }
+ igt_assert_eq_u32(*(uint32_t *)pages, total - sz);
+ igt_assert(mlock(space, total) == 0);
+ close(memfd);
+
+ /* Check we can create a normal userptr bo wrapping the wrapper */
+ gem_userptr(i915, space, total, false, userptr_flags, &rhandle);
+ gem_set_domain(i915, rhandle, I915_GEM_DOMAIN_CPU, 0);
+ for (uint32_t offset = 0; offset < total; offset += sz)
+ store_dword(i915, rhandle, offset + 4, offset / sz);
+ gem_sync(i915, rhandle);
+ igt_assert_eq_u32(*(uint32_t *)(pages + 0), total - sz);
+ igt_assert_eq_u32(*(uint32_t *)(pages + 4), total / sz - 1);
+ gem_close(i915, rhandle);
+
+ /* Now enforce read-only henceforth */
+ igt_assert(mprotect(space, total, PROT_READ) == 0);
+
+ SHA1(pages, sz, orig);
+ igt_fork(child, 1) {
+ const int gen = intel_gen(intel_get_drm_devid(i915));
+ const int nreloc = 1024;
+ struct drm_i915_gem_relocation_entry *reloc;
+ struct drm_i915_gem_exec_object2 obj[2];
+ struct drm_i915_gem_execbuffer2 exec;
+ unsigned char ref[SHA_DIGEST_LENGTH], result[SHA_DIGEST_LENGTH];
+ uint32_t *batch;
+ int i;
+
+ reloc = calloc(sizeof(*reloc), nreloc);
+ gem_userptr(i915, space, total, true, userptr_flags, &rhandle);
+
+
+ memset(obj, 0, sizeof(obj));
+ obj[0].flags = LOCAL_EXEC_OBJECT_SUPPORTS_48B;
+ obj[1].handle = gem_create(i915, 4096*16);
+ obj[1].relocation_count = nreloc;
+ obj[1].relocs_ptr = to_user_pointer(reloc);
+
+ batch = gem_mmap__wc(i915, obj[1].handle, 0, 4096*16, PROT_WRITE);
+
+ memset(&exec, 0, sizeof(exec));
+ exec.buffer_count =2;
+ exec.buffers_ptr = to_user_pointer(obj);
+
+ for_each_engine(i915, exec.flags) {
+ /* First tweak the backing store through the write */
+ i = 0;
+ obj[0].handle = whandle;
+ for (int n = 0; n < nreloc; n++) {
+ uint64_t offset;
+
+ reloc[n].target_handle = obj[0].handle;
+ reloc[n].delta = 4*(rand() % (sz/4));
+ reloc[n].offset = (i+1) * sizeof(uint32_t);
+ reloc[n].presumed_offset = obj[0].offset;
+ reloc[n].read_domains = I915_GEM_DOMAIN_RENDER;
+ reloc[n].write_domain = I915_GEM_DOMAIN_RENDER;
+
+ offset = reloc[n].presumed_offset + reloc[n].delta;
+
+ batch[i] = MI_STORE_DWORD_IMM | (gen < 6 ? 1 << 22 : 0);
+ if (gen >= 8) {
+ batch[++i] = offset;
+ batch[++i] = offset >> 32;
+ } else if (gen >= 4) {
+ batch[++i] = 0;
+ batch[++i] = offset;
+ reloc[n].offset += sizeof(uint32_t);
+ } else {
+ batch[i]--;
+ batch[++i] = offset;
+ }
+ batch[++i] = rand();
+ i++;
+ }
+ batch[i] = MI_BATCH_BUFFER_END;
+
+ gem_execbuf(i915, &exec);
+ gem_sync(i915, obj[0].handle);
+ SHA1(pages, sz, ref);
+
+ igt_assert(memcmp(ref, orig, sizeof(ref)));
+ memcpy(orig, ref, sizeof(orig));
+
+ /* Now try the same through the read-only handle */
+ i = 0;
+ obj[0].handle = rhandle;
+ for (int n = 0; n < nreloc; n++) {
+ uint64_t offset;
+
+ reloc[n].target_handle = obj[0].handle;
+ reloc[n].delta = 4*(rand() % (total/4));
+ reloc[n].offset = (i+1) * sizeof(uint32_t);
+ reloc[n].presumed_offset = obj[0].offset;
+ reloc[n].read_domains = I915_GEM_DOMAIN_RENDER;
+ reloc[n].write_domain = I915_GEM_DOMAIN_RENDER;
+
+ offset = reloc[n].presumed_offset + reloc[n].delta;
+
+ batch[i] = MI_STORE_DWORD_IMM | (gen < 6 ? 1 << 22 : 0);
+ if (gen >= 8) {
+ batch[++i] = offset;
+ batch[++i] = offset >> 32;
+ } else if (gen >= 4) {
+ batch[++i] = 0;
+ batch[++i] = offset;
+ reloc[n].offset += sizeof(uint32_t);
+ } else {
+ batch[i]--;
+ batch[++i] = offset;
+ }
+ batch[++i] = rand();
+ i++;
+ }
+ batch[i] = MI_BATCH_BUFFER_END;
+
+ gem_execbuf(i915, &exec);
+ gem_sync(i915, obj[0].handle);
+ SHA1(pages, sz, result);
+
+ /*
+ * As the writes into the read-only GPU bo should fail,
+ * the SHA1 hash of the backing store should be
+ * unaffected.
+ */
+ igt_assert(memcmp(ref, result, SHA_DIGEST_LENGTH) == 0);
+ }
+
+ munmap(batch, 16*4096);
+ gem_close(i915, obj[1].handle);
+ gem_close(i915, rhandle);
+ }
+ igt_waitchildren();
+
+ munmap(space, total);
+ munmap(pages, sz);
+
+ return 0;
+}
+
static int test_usage_restrictions(int fd)
{
void *ptr;
@@ -1642,6 +1830,9 @@ int main(int argc, char **argv)
igt_subtest("dmabuf-unsync")
test_dmabuf();
+ igt_subtest("readonly-unsync")
+ test_readonly(fd);
+
for (unsigned flags = 0; flags < ALL_FORKING_EVICTIONS + 1; flags++) {
igt_subtest_f("forked-unsync%s%s%s-%s",
flags & FORKING_EVICTIONS_SWAPPING ? "-swapping" : "",
--
2.17.0
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