[Intel-gfx] [PATCH v2 02/14] drm/i915: Clean up skl_program_scaler()

Rodrigo Vivi rodrigo.vivi at intel.com
Thu Nov 1 18:13:50 UTC 2018


On Thu, Nov 01, 2018 at 05:17:36PM +0200, Ville Syrjala wrote:
> From: Ville Syrjälä <ville.syrjala at linux.intel.com>
> 
> Remove the "sizes are 0 based" stuff that is not even true for the
> scaler.
> 
> v2: Rebase
> 
> Signed-off-by: Ville Syrjälä <ville.syrjala at linux.intel.com>

Reviewed-by: Rodrigo Vivi <rodrigo.vivi at intel.com>

> ---
>  drivers/gpu/drm/i915/intel_sprite.c | 18 +++++-------------
>  1 file changed, 5 insertions(+), 13 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/intel_sprite.c b/drivers/gpu/drm/i915/intel_sprite.c
> index 30b7485f1992..a77a17fda692 100644
> --- a/drivers/gpu/drm/i915/intel_sprite.c
> +++ b/drivers/gpu/drm/i915/intel_sprite.c
> @@ -310,12 +310,11 @@ skl_plane_max_stride(struct intel_plane *plane,
>  }
>  
>  static void
> -skl_program_scaler(struct drm_i915_private *dev_priv,
> -		   struct intel_plane *plane,
> +skl_program_scaler(struct intel_plane *plane,
>  		   const struct intel_crtc_state *crtc_state,
>  		   const struct intel_plane_state *plane_state)
>  {
> -	enum plane_id plane_id = plane->id;
> +	struct drm_i915_private *dev_priv = to_i915(plane->base.dev);
>  	enum pipe pipe = plane->pipe;
>  	int scaler_id = plane_state->scaler_id;
>  	const struct intel_scaler *scaler =
> @@ -327,10 +326,6 @@ skl_program_scaler(struct drm_i915_private *dev_priv,
>  	u16 y_hphase, uv_rgb_hphase;
>  	u16 y_vphase, uv_rgb_vphase;
>  
> -	/* Sizes are 0 based */
> -	crtc_w--;
> -	crtc_h--;
> -
>  	/* TODO: handle sub-pixel coordinates */
>  	if (plane_state->base.fb->format->format == DRM_FORMAT_NV12 &&
>  	    !icl_is_hdr_plane(plane)) {
> @@ -350,15 +345,14 @@ skl_program_scaler(struct drm_i915_private *dev_priv,
>  	}
>  
>  	I915_WRITE_FW(SKL_PS_CTRL(pipe, scaler_id),
> -		      PS_SCALER_EN | PS_PLANE_SEL(plane_id) | scaler->mode);
> +		      PS_SCALER_EN | PS_PLANE_SEL(plane->id) | scaler->mode);
>  	I915_WRITE_FW(SKL_PS_PWR_GATE(pipe, scaler_id), 0);
>  	I915_WRITE_FW(SKL_PS_VPHASE(pipe, scaler_id),
>  		      PS_Y_PHASE(y_vphase) | PS_UV_RGB_PHASE(uv_rgb_vphase));
>  	I915_WRITE_FW(SKL_PS_HPHASE(pipe, scaler_id),
>  		      PS_Y_PHASE(y_hphase) | PS_UV_RGB_PHASE(uv_rgb_hphase));
>  	I915_WRITE_FW(SKL_PS_WIN_POS(pipe, scaler_id), (crtc_x << 16) | crtc_y);
> -	I915_WRITE_FW(SKL_PS_WIN_SZ(pipe, scaler_id),
> -		      ((crtc_w + 1) << 16)|(crtc_h + 1));
> +	I915_WRITE_FW(SKL_PS_WIN_SZ(pipe, scaler_id), (crtc_w << 16) | crtc_h);
>  }
>  
>  static void
> @@ -441,11 +435,9 @@ skl_program_plane(struct intel_plane *plane,
>  		I915_WRITE_FW(PLANE_CUS_CTL(pipe, plane_id), cus_ctl);
>  	}
>  
> -	/* program plane scaler */
>  	if (plane_state->scaler_id >= 0) {
>  		if (!slave)
> -			skl_program_scaler(dev_priv, plane,
> -					   crtc_state, plane_state);
> +			skl_program_scaler(plane, crtc_state, plane_state);
>  
>  		I915_WRITE_FW(PLANE_POS(pipe, plane_id), 0);
>  	} else {
> -- 
> 2.18.1
> 
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx at lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx


More information about the Intel-gfx mailing list