[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for DSC enabling remaining patches
Patchwork
patchwork at emeril.freedesktop.org
Fri Nov 2 06:59:55 UTC 2018
== Series Details ==
Series: DSC enabling remaining patches
URL : https://patchwork.freedesktop.org/series/51916/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
318c014747fe drm/dsc: Define Display Stream Compression PPS infoframe
-:31: WARNING:FILE_PATH_CHANGES: added, moved or deleted file(s), does MAINTAINERS need updating?
#31:
new file mode 100644
total: 0 errors, 1 warnings, 0 checks, 342 lines checked
6005b5b6fd09 drm/dsc: Define VESA Display Stream Compression Capabilities
-:34: WARNING:BAD_SIGN_OFF: Non-standard signature: Co-developed-by:
#34:
Co-developed-by: Gaurav K Singh <gaurav.k.singh at intel.com>
-:73: CHECK:BOOL_MEMBER: Avoid using bool structure members because of possible alignment issues - see: https://lkml.org/lkml/2017/11/21/384
#73: FILE: include/drm/drm_dsc.h:40:
+ bool convert_rgb;
-:83: CHECK:BOOL_MEMBER: Avoid using bool structure members because of possible alignment issues - see: https://lkml.org/lkml/2017/11/21/384
#83: FILE: include/drm/drm_dsc.h:50:
+ bool enable422;
-:108: CHECK:BOOL_MEMBER: Avoid using bool structure members because of possible alignment issues - see: https://lkml.org/lkml/2017/11/21/384
#108: FILE: include/drm/drm_dsc.h:75:
+ bool block_pred_enable;
-:136: CHECK:BOOL_MEMBER: Avoid using bool structure members because of possible alignment issues - see: https://lkml.org/lkml/2017/11/21/384
#136: FILE: include/drm/drm_dsc.h:103:
+ bool vbr_enable;
-:151: CHECK:BOOL_MEMBER: Avoid using bool structure members because of possible alignment issues - see: https://lkml.org/lkml/2017/11/21/384
#151: FILE: include/drm/drm_dsc.h:118:
+ bool native_422;
-:153: CHECK:BOOL_MEMBER: Avoid using bool structure members because of possible alignment issues - see: https://lkml.org/lkml/2017/11/21/384
#153: FILE: include/drm/drm_dsc.h:120:
+ bool native_420;
total: 0 errors, 1 warnings, 6 checks, 121 lines checked
dd95e78514f2 drm/dsc: Define Rate Control values that do not change over configurations
-:42: WARNING:NO_AUTHOR_SIGN_OFF: Missing Signed-off-by: line by nominal patch author 'Srivatsa, Anusha <anusha.srivatsa at intel.com>'
total: 0 errors, 1 warnings, 0 checks, 12 lines checked
488532545dd6 drm/dsc: Add helpers for DSC picture parameter set infoframes
-:27: WARNING:COMMIT_LOG_LONG_LINE: Possible unwrapped commit description (prefer a maximum 75 chars per line)
#27:
* Add reference to added kernel-docs in Documentation/gpu/drm-kms-helpers.rst
-:78: WARNING:FILE_PATH_CHANGES: added, moved or deleted file(s), does MAINTAINERS need updating?
#78:
new file mode 100644
total: 0 errors, 2 warnings, 0 checks, 285 lines checked
ca380ce7be74 drm/i915/dp: Add DSC params and DSC config to intel_crtc_state
-:49: CHECK:BOOL_MEMBER: Avoid using bool structure members because of possible alignment issues - see: https://lkml.org/lkml/2017/11/21/384
#49: FILE: drivers/gpu/drm/i915/intel_drv.h:942:
+ bool compression_enable;
-:50: CHECK:BOOL_MEMBER: Avoid using bool structure members because of possible alignment issues - see: https://lkml.org/lkml/2017/11/21/384
#50: FILE: drivers/gpu/drm/i915/intel_drv.h:943:
+ bool dsc_split;
total: 0 errors, 0 warnings, 2 checks, 22 lines checked
ef64a8d0cc80 drm/i915/dp: Compute DSC pipe config in atomic check
-:163: CHECK:SPACING: spaces preferred around that '*' (ctx:VxV)
#163: FILE: drivers/gpu/drm/i915/intel_dp.c:1897:
+ bpp = min(bpp, 3*bpc);
^
-:292: CHECK:SPACING: spaces preferred around that '*' (ctx:VxV)
#292: FILE: drivers/gpu/drm/i915/intel_dp.c:2106:
+ limits.max_bpp >= DP_DSC_MIN_SUPPORTED_BPC*3)
^
total: 0 errors, 0 warnings, 2 checks, 314 lines checked
74c05c0ed3b6 drm/i915/dp: Do not enable PSR2 if DSC is enabled
f5bef3714875 drm/dsc: Define the DSC 1.1 and 1.2 Line Buffer depth constants
9a5a5914e037 drm/i915/dsc: Define & Compute VESA DSC params
-:65: WARNING:BAD_SIGN_OFF: Non-standard signature: Co-developed-by:
#65:
Co-developed-by: Manasi Navare <manasi.d.navare at intel.com>
-:92: WARNING:MISSING_SPACE: break quoted strings at a space character
#92: FILE: drivers/gpu/drm/i915/intel_dp.c:2074:
+ DRM_ERROR("Cannot compute valid DSC parameters for Input Bpp = %d"
+ "Compressed BPP = %d\n",
-:116: WARNING:FILE_PATH_CHANGES: added, moved or deleted file(s), does MAINTAINERS need updating?
#116:
new file mode 100644
-:402: CHECK:LINE_SPACING: Please use a blank line after function/struct/union/enum declarations
#402: FILE: drivers/gpu/drm/i915/intel_vdsc.c:282:
+}
+};
total: 0 errors, 3 warnings, 1 checks, 496 lines checked
5012a28fec24 drm/i915/dsc: Compute Rate Control parameters for DSC
-:138: CHECK:SPACING: space preferred before that '*' (ctx:VxE)
#138: FILE: drivers/gpu/drm/i915/intel_vdsc.c:411:
+ vdsc_cfg->slice_bpg_offset)*
^
-:170: CHECK:LINE_SPACING: Please don't use multiple blank lines
#170: FILE: drivers/gpu/drm/i915/intel_vdsc.c:443:
+
+
total: 0 errors, 0 warnings, 2 checks, 138 lines checked
1bbc6d669fe7 drm/i915/dp: Enable/Disable DSC in DP Sink
f4d4cef846f8 drm/i915/dsc: Add a power domain for VDSC on eDP/MIPI DSI
47159c173f35 drm/i915/dp: Configure i915 Picture parameter Set registers during DSC enabling
-:43: CHECK:AVOID_EXTERNS: extern prototypes should be avoided in .h files
#43: FILE: drivers/gpu/drm/i915/i915_drv.h:3488:
+extern void intel_dsc_enable(struct intel_encoder *encoder,
-:111: WARNING:TABSTOP: Statements should start on a tabstop
#111: FILE: drivers/gpu/drm/i915/intel_vdsc.c:621:
+ if (cpu_transcoder == TRANSCODER_EDP) {
-:355: CHECK:SPACING: spaces preferred around that '/' (ctx:VxV)
#355: FILE: drivers/gpu/drm/i915/intel_vdsc.c:865:
+ rc_buf_thresh_dword[i/4] |= (u32)(vdsc_cfg->rc_buf_thresh[i] <<
^
-:358: CHECK:SPACING: spaces preferred around that '/' (ctx:VxV)
#358: FILE: drivers/gpu/drm/i915/intel_vdsc.c:868:
+ rc_buf_thresh_dword[i/4]);
^
-:399: WARNING:LONG_LINE: line over 100 characters
#399: FILE: drivers/gpu/drm/i915/intel_vdsc.c:909:
+ rc_range_params_dword[i/2] |= (u32)(((vdsc_cfg->rc_range_params[i].range_bpg_offset <<
-:399: CHECK:SPACING: spaces preferred around that '/' (ctx:VxV)
#399: FILE: drivers/gpu/drm/i915/intel_vdsc.c:909:
+ rc_range_params_dword[i/2] |= (u32)(((vdsc_cfg->rc_range_params[i].range_bpg_offset <<
^
-:406: CHECK:SPACING: spaces preferred around that '/' (ctx:VxV)
#406: FILE: drivers/gpu/drm/i915/intel_vdsc.c:916:
+ rc_range_params_dword[i/2]);
^
-:484: CHECK:BRACES: Blank lines aren't necessary after an open brace '{'
#484: FILE: drivers/gpu/drm/i915/intel_vdsc.c:994:
+{
+
-:491: WARNING:RETURN_VOID: void function return statements are not generally useful
#491: FILE: drivers/gpu/drm/i915/intel_vdsc.c:1001:
+ return;
+}
total: 0 errors, 3 warnings, 6 checks, 442 lines checked
381a0b30ab76 drm/i915/dp: Use the existing write_infoframe() for DSC PPS SDPs
5ca60713afaa drm/i915/dp: Populate DSC PPS SDP and send PPS infoframes
12f838b8fa8d drm/i915/dp: Configure Display stream splitter registers during DSC enable
9e8c891105fe drm/i915/dp: Disable DSC in source by disabling DSS CTL bits
-:35: CHECK:AVOID_EXTERNS: extern prototypes should be avoided in .h files
#35: FILE: drivers/gpu/drm/i915/i915_drv.h:3490:
+extern void intel_dsc_disable(const struct intel_crtc_state *crtc_state);
-:91: CHECK:BRACES: Blank lines aren't necessary before a close brace '}'
#91: FILE: drivers/gpu/drm/i915/intel_vdsc.c:1075:
+
+}
total: 0 errors, 0 warnings, 2 checks, 50 lines checked
73a2398b4b92 drm/i915/dsc: Enable and disable appropriate power wells for VDSC
4cba93695154 drm/i915/dsc: Add Per connector debugfs node for DSC support/enable
-:112: WARNING:SYMBOLIC_PERMS: Symbolic permissions 'S_IRUGO' are not preferred. Consider using octal permissions '0444'.
#112: FILE: drivers/gpu/drm/i915/i915_debugfs.c:5090:
+ debugfs_create_file("i915_dsc_support", S_IRUGO, root,
-:149: CHECK:BOOL_MEMBER: Avoid using bool structure members because of possible alignment issues - see: https://lkml.org/lkml/2017/11/21/384
#149: FILE: drivers/gpu/drm/i915/intel_drv.h:1204:
+ bool force_dsc_en;
total: 0 errors, 1 warnings, 1 checks, 109 lines checked
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