[Intel-gfx] [PATCH v1] drm/i915: GTT offset is cut by 32b-flag.

[Michal Wajdeczko]

On Fri, 02 Nov 2018 17:32:06 +0100, Lionel Landwerlin  
<lionel.g.landwerlin at intel.com> wrote:

> On 02/11/2018 15:47, Sergii Romantsov wrote:
>> Operating with gtt-addresses has to be done with 64b variables.
>>
>> CC: Kenneth Graunke <kenneth at whitecape.org>
>> CC: Chris Wilson <chris at chris-wilson.co.uk>
>> Fixes: a363bb2cd0e2 (i965: Allocate VMA in userspace for full-PPGTT  
>> systems.)
>> Fixes: c7c6e46f913b (drm/i915: Convert execbuf to use struct-of-array  
>> packing for critical fields)
>> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=108619
>> Signed-off-by: Sergii Romantsov <sergii.romantsov at globallogic.com>
>
>
> Thanks a lot for finding this. Looks good to me. I'll let Chris decide  
> whether to turn all the bit masks into 64bits.

+1 for using BIT_ULL for all PIN_XXX definitions (plus some fixups in code)

Michal

>
>
> Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin at intel.com>
>
>
>> ---
>>   drivers/gpu/drm/i915/i915_gem_execbuffer.c | 2 +-
>>   1 file changed, 1 insertion(+), 1 deletion(-)
>>
>> diff --git a/drivers/gpu/drm/i915/i915_gem_execbuffer.c  
>> b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
>> index 3f0c612..1973b79 100644
>> --- a/drivers/gpu/drm/i915/i915_gem_execbuffer.c
>> +++ b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
>> @@ -611,7 +611,7 @@ static int eb_reserve_vma(const struct  
>> i915_execbuffer *eb,
>>     	if (exec_flags & EXEC_OBJECT_PINNED) {
>>   		pin_flags |= entry->offset | PIN_OFFSET_FIXED;
>> -		pin_flags &= ~PIN_NONBLOCK; /* force overlapping checks */
>> +		pin_flags &= ~(u64)PIN_NONBLOCK; /* force overlapping checks */
>>   	} else if (exec_flags & __EXEC_OBJECT_NEEDS_BIAS) {
>>   		pin_flags |= BATCH_OFFSET_BIAS | PIN_OFFSET_BIAS;
>>   	}
>
>
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