[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for DSC enabling remaining patches respin

Patchwork patchwork at emeril.freedesktop.org
Fri Nov 2 21:51:07 UTC 2018 

== Series Details ==

Series: DSC enabling remaining patches respin
URL   : https://patchwork.freedesktop.org/series/51986/
State : warning

== Summary ==

$ dim checkpatch origin/drm-tip
9b21924528e8 drm/dsc: Define Display Stream Compression PPS infoframe
-:31: WARNING:FILE_PATH_CHANGES: added, moved or deleted file(s), does MAINTAINERS need updating?
#31: 
new file mode 100644

total: 0 errors, 1 warnings, 0 checks, 342 lines checked
16a55a785bf0 drm/dsc: Define VESA Display Stream Compression Capabilities
-:34: WARNING:BAD_SIGN_OFF: Non-standard signature: Co-developed-by:
#34: 
Co-developed-by: Gaurav K Singh <gaurav.k.singh at intel.com>

-:73: CHECK:BOOL_MEMBER: Avoid using bool structure members because of possible alignment issues - see: https://lkml.org/lkml/2017/11/21/384
#73: FILE: include/drm/drm_dsc.h:40:
+	bool convert_rgb;

-:83: CHECK:BOOL_MEMBER: Avoid using bool structure members because of possible alignment issues - see: https://lkml.org/lkml/2017/11/21/384
#83: FILE: include/drm/drm_dsc.h:50:
+	bool enable422;

-:108: CHECK:BOOL_MEMBER: Avoid using bool structure members because of possible alignment issues - see: https://lkml.org/lkml/2017/11/21/384
#108: FILE: include/drm/drm_dsc.h:75:
+	bool block_pred_enable;

-:136: CHECK:BOOL_MEMBER: Avoid using bool structure members because of possible alignment issues - see: https://lkml.org/lkml/2017/11/21/384
#136: FILE: include/drm/drm_dsc.h:103:
+	bool vbr_enable;

-:151: CHECK:BOOL_MEMBER: Avoid using bool structure members because of possible alignment issues - see: https://lkml.org/lkml/2017/11/21/384
#151: FILE: include/drm/drm_dsc.h:118:
+	bool native_422;

-:153: CHECK:BOOL_MEMBER: Avoid using bool structure members because of possible alignment issues - see: https://lkml.org/lkml/2017/11/21/384
#153: FILE: include/drm/drm_dsc.h:120:
+	bool native_420;

total: 0 errors, 1 warnings, 6 checks, 121 lines checked
ce9a9d5aa5fb drm/dsc: Define Rate Control values that do not change over configurations
-:42: WARNING:NO_AUTHOR_SIGN_OFF: Missing Signed-off-by: line by nominal patch author 'Srivatsa, Anusha <anusha.srivatsa at intel.com>'

total: 0 errors, 1 warnings, 0 checks, 12 lines checked
6af5ac50eb08 drm/dsc: Add helpers for DSC picture parameter set infoframes
-:78: WARNING:FILE_PATH_CHANGES: added, moved or deleted file(s), does MAINTAINERS need updating?
#78: 
new file mode 100644

total: 0 errors, 1 warnings, 0 checks, 285 lines checked
c08bada2b32b drm/dsc: Define the DSC 1.1 and 1.2 Line Buffer depth constants
25415c4aaac3 drm/i915/dp: Add DSC params and DSC config to intel_crtc_state
-:49: CHECK:BOOL_MEMBER: Avoid using bool structure members because of possible alignment issues - see: https://lkml.org/lkml/2017/11/21/384
#49: FILE: drivers/gpu/drm/i915/intel_drv.h:942:
+		bool compression_enable;

-:50: CHECK:BOOL_MEMBER: Avoid using bool structure members because of possible alignment issues - see: https://lkml.org/lkml/2017/11/21/384
#50: FILE: drivers/gpu/drm/i915/intel_drv.h:943:
+		bool dsc_split;

total: 0 errors, 0 warnings, 2 checks, 22 lines checked
a0605ab24857 drm/i915/dp: Compute DSC pipe config in atomic check
-:166: CHECK:SPACING: spaces preferred around that '*' (ctx:VxV)
#166: FILE: drivers/gpu/drm/i915/intel_dp.c:1897:
+			bpp = min(bpp, 3*bpc);
 			                ^

-:268: CHECK:SPACING: spaces preferred around that '*' (ctx:VxV)
#268: FILE: drivers/gpu/drm/i915/intel_dp.c:2109:
+	    limits.max_bpp >= DP_DSC_MIN_SUPPORTED_BPC*3)
 	                                              ^

total: 0 errors, 0 warnings, 2 checks, 289 lines checked
a333f52a4ca6 drm/i915/dp: Do not enable PSR2 if DSC is enabled
841953754a45 drm/i915/dsc: Define & Compute VESA DSC params
-:68: WARNING:BAD_SIGN_OFF: Non-standard signature: Co-developed-by:
#68: 
Co-developed-by: Manasi Navare <manasi.d.navare at intel.com>

-:95: WARNING:MISSING_SPACE: break quoted strings at a space character
#95: FILE: drivers/gpu/drm/i915/intel_dp.c:2077:
+		DRM_DEBUG_KMS("Cannot compute valid DSC parameters for Input Bpp = %d"
+			      "Compressed BPP = %d\n",

-:119: WARNING:FILE_PATH_CHANGES: added, moved or deleted file(s), does MAINTAINERS need updating?
#119: 
new file mode 100644

-:405: CHECK:LINE_SPACING: Please use a blank line after function/struct/union/enum declarations
#405: FILE: drivers/gpu/drm/i915/intel_vdsc.c:282:
+}
+};

total: 0 errors, 3 warnings, 1 checks, 496 lines checked
1f8a2181315a drm/i915/dsc: Compute Rate Control parameters for DSC
-:141: CHECK:SPACING: space preferred before that '*' (ctx:VxE)
#141: FILE: drivers/gpu/drm/i915/intel_vdsc.c:411:
+				vdsc_cfg->slice_bpg_offset)*
 				                           ^

-:173: CHECK:LINE_SPACING: Please don't use multiple blank lines
#173: FILE: drivers/gpu/drm/i915/intel_vdsc.c:443:
+
+

total: 0 errors, 0 warnings, 2 checks, 138 lines checked
208eb32701a1 drm/i915/dp: Enable/Disable DSC in DP Sink
41b1b06d6535 drm/i915/dsc: Add a power domain for VDSC on eDP/MIPI DSI
9c45e1aded49 drm/i915/dp: Configure i915 Picture parameter Set registers during DSC enabling
-:45: CHECK:AVOID_EXTERNS: extern prototypes should be avoided in .h files
#45: FILE: drivers/gpu/drm/i915/i915_drv.h:3488:
+extern void intel_dsc_enable(struct intel_encoder *encoder,

-:369: CHECK:SPACING: spaces preferred around that '/' (ctx:VxV)
#369: FILE: drivers/gpu/drm/i915/intel_vdsc.c:865:
+		rc_buf_thresh_dword[i/4] |= (u32)(vdsc_cfg->rc_buf_thresh[i] <<
 		                     ^

-:372: CHECK:SPACING: spaces preferred around that '/' (ctx:VxV)
#372: FILE: drivers/gpu/drm/i915/intel_vdsc.c:868:
+			 rc_buf_thresh_dword[i/4]);
 			                      ^

-:413: WARNING:LONG_LINE: line over 100 characters
#413: FILE: drivers/gpu/drm/i915/intel_vdsc.c:909:
+		rc_range_params_dword[i/2] |= (u32)(((vdsc_cfg->rc_range_params[i].range_bpg_offset <<

-:413: CHECK:SPACING: spaces preferred around that '/' (ctx:VxV)
#413: FILE: drivers/gpu/drm/i915/intel_vdsc.c:909:
+		rc_range_params_dword[i/2] |= (u32)(((vdsc_cfg->rc_range_params[i].range_bpg_offset <<
 		                       ^

-:420: CHECK:SPACING: spaces preferred around that '/' (ctx:VxV)
#420: FILE: drivers/gpu/drm/i915/intel_vdsc.c:916:
+			 rc_range_params_dword[i/2]);
 			                        ^

-:498: CHECK:BRACES: Blank lines aren't necessary after an open brace '{'
#498: FILE: drivers/gpu/drm/i915/intel_vdsc.c:994:
+{
+

-:505: WARNING:RETURN_VOID: void function return statements are not generally useful
#505: FILE: drivers/gpu/drm/i915/intel_vdsc.c:1001:
+	return;
+}

total: 0 errors, 2 warnings, 6 checks, 449 lines checked
1589f5d9255e drm/i915/dp: Use the existing write_infoframe() for DSC PPS SDPs
79969e3036d7 drm/i915/dp: Populate DSC PPS SDP and send PPS infoframes
deab2c238d2d drm/i915/dp: Configure Display stream splitter registers during DSC enable
4d7757a7720d drm/i915/dp: Disable DSC in source by disabling DSS CTL bits
-:35: CHECK:AVOID_EXTERNS: extern prototypes should be avoided in .h files
#35: FILE: drivers/gpu/drm/i915/i915_drv.h:3490:
+extern void intel_dsc_disable(const struct intel_crtc_state *crtc_state);

-:91: CHECK:BRACES: Blank lines aren't necessary before a close brace '}'
#91: FILE: drivers/gpu/drm/i915/intel_vdsc.c:1075:
+
+}

total: 0 errors, 0 warnings, 2 checks, 50 lines checked
acf9fa521cc3 drm/i915/dsc: Enable and disable appropriate power wells for VDSC
df00b8b0ab11 drm/i915/dsc: Add Per connector debugfs node for DSC support/enable
-:112: WARNING:SYMBOLIC_PERMS: Symbolic permissions 'S_IRUGO' are not preferred. Consider using octal permissions '0444'.
#112: FILE: drivers/gpu/drm/i915/i915_debugfs.c:5090:
+		debugfs_create_file("i915_dsc_support", S_IRUGO, root,

-:149: CHECK:BOOL_MEMBER: Avoid using bool structure members because of possible alignment issues - see: https://lkml.org/lkml/2017/11/21/384
#149: FILE: drivers/gpu/drm/i915/intel_drv.h:1204:
+	bool force_dsc_en;

total: 0 errors, 1 warnings, 1 checks, 109 lines checked

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