[Intel-gfx] [PATCH 07/14] drm/i915: Move single buffered plane register writes to the end
Rodrigo Vivi
rodrigo.vivi at intel.com
Wed Nov 7 21:26:47 UTC 2018
On Thu, Nov 01, 2018 at 05:05:58PM +0200, Ville Syrjala wrote:
> From: Ville Syrjälä <ville.syrjala at linux.intel.com>
>
> The plane color correction registers are single buffered. So
> ideally we would write them at the start of vblank just after the
> double buffered plane registers have been latched. Since we have
> no convenient way to do that for now let's at least move the
> single buffered register writes to happen after the double
> buffered registers have been written.
>
> Signed-off-by: Ville Syrjälä <ville.syrjala at linux.intel.com>
Reviewed-by: Rodrigo Vivi <rodrigo.vivi at intel.com>
> ---
> drivers/gpu/drm/i915/intel_sprite.c | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_sprite.c b/drivers/gpu/drm/i915/intel_sprite.c
> index 455b2d0cbaa6..84c5f532fba5 100644
> --- a/drivers/gpu/drm/i915/intel_sprite.c
> +++ b/drivers/gpu/drm/i915/intel_sprite.c
> @@ -718,8 +718,6 @@ vlv_update_plane(struct intel_plane *plane,
>
> spin_lock_irqsave(&dev_priv->uncore.lock, irqflags);
>
> - vlv_update_clrc(plane_state);
> -
> I915_WRITE_FW(SPSTRIDE(pipe, plane_id),
> plane_state->color_plane[0].stride);
> I915_WRITE_FW(SPPOS(pipe, plane_id), (crtc_y << 16) | crtc_x);
> @@ -747,6 +745,8 @@ vlv_update_plane(struct intel_plane *plane,
> I915_WRITE_FW(SPSURF(pipe, plane_id),
> intel_plane_ggtt_offset(plane_state) + sprsurf_offset);
>
> + vlv_update_clrc(plane_state);
> +
> spin_unlock_irqrestore(&dev_priv->uncore.lock, irqflags);
> }
>
> --
> 2.18.1
>
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