[Intel-gfx] [PATCH 08/14] drm/i915: Generalize skl_ddb_allocation_overlaps()

Rodrigo Vivi rodrigo.vivi at intel.com
Wed Nov 7 21:28:52 UTC 2018


On Thu, Nov 01, 2018 at 05:05:59PM +0200, Ville Syrjala wrote:
> From: Ville Syrjälä <ville.syrjala at linux.intel.com>
> 
> Make skl_ddb_allocation_overlaps() useful for other callers
> besides skl_update_crtcs(). We'll need it to do plane updates
> as well.
> 
> And while we're here we can reduce the stack utilization a
> bit by noting that each struct skl_ddb_entry is 4 bytes whereas
> a pointer to one is 8 bytes (on 64bit). So we'll switch to an
> array of structs from the array of pointers we used before.
> 
> Signed-off-by: Ville Syrjälä <ville.syrjala at linux.intel.com>

Reviewed-by: Rodrigo Vivi <rodrigo.vivi at intel.com>

> ---
>  drivers/gpu/drm/i915/intel_display.c | 12 +++++-------
>  drivers/gpu/drm/i915/intel_drv.h     |  7 +++----
>  drivers/gpu/drm/i915/intel_pm.c      | 15 +++++++--------
>  3 files changed, 15 insertions(+), 19 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
> index 9521cff5fb44..852b5897e80b 100644
> --- a/drivers/gpu/drm/i915/intel_display.c
> +++ b/drivers/gpu/drm/i915/intel_display.c
> @@ -12678,13 +12678,12 @@ static void skl_update_crtcs(struct drm_atomic_state *state)
>  	int i;
>  	u8 hw_enabled_slices = dev_priv->wm.skl_hw.ddb.enabled_slices;
>  	u8 required_slices = intel_state->wm_results.ddb.enabled_slices;
> -
> -	const struct skl_ddb_entry *entries[I915_MAX_PIPES] = {};
> +	struct skl_ddb_entry entries[I915_MAX_PIPES] = {};
>  
>  	for_each_oldnew_crtc_in_state(state, crtc, old_crtc_state, new_crtc_state, i)
>  		/* ignore allocations for crtc's that have been turned off. */
>  		if (new_crtc_state->active)
> -			entries[i] = &to_intel_crtc_state(old_crtc_state)->wm.skl.ddb;
> +			entries[i] = to_intel_crtc_state(old_crtc_state)->wm.skl.ddb;
>  
>  	/* If 2nd DBuf slice required, enable it here */
>  	if (INTEL_GEN(dev_priv) >= 11 && required_slices > hw_enabled_slices)
> @@ -12710,14 +12709,13 @@ static void skl_update_crtcs(struct drm_atomic_state *state)
>  			if (updated & cmask || !cstate->base.active)
>  				continue;
>  
> -			if (skl_ddb_allocation_overlaps(dev_priv,
> +			if (skl_ddb_allocation_overlaps(&cstate->wm.skl.ddb,
>  							entries,
> -							&cstate->wm.skl.ddb,
> -							i))
> +							INTEL_INFO(dev_priv)->num_pipes, i))
>  				continue;
>  
>  			updated |= cmask;
> -			entries[i] = &cstate->wm.skl.ddb;
> +			entries[i] = cstate->wm.skl.ddb;
>  
>  			/*
>  			 * If this is an already active pipe, it's DDB changed,
> diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
> index c5acc5f0d518..5331bbed5e8c 100644
> --- a/drivers/gpu/drm/i915/intel_drv.h
> +++ b/drivers/gpu/drm/i915/intel_drv.h
> @@ -2182,10 +2182,9 @@ int intel_enable_sagv(struct drm_i915_private *dev_priv);
>  int intel_disable_sagv(struct drm_i915_private *dev_priv);
>  bool skl_wm_level_equals(const struct skl_wm_level *l1,
>  			 const struct skl_wm_level *l2);
> -bool skl_ddb_allocation_overlaps(struct drm_i915_private *dev_priv,
> -				 const struct skl_ddb_entry **entries,
> -				 const struct skl_ddb_entry *ddb,
> -				 int ignore);
> +bool skl_ddb_allocation_overlaps(const struct skl_ddb_entry *ddb,
> +				 const struct skl_ddb_entry entries[],
> +				 int num_entries, int ignore_idx);
>  bool ilk_disable_lp_wm(struct drm_device *dev);
>  int skl_check_pipe_max_pixel_rate(struct intel_crtc *intel_crtc,
>  				  struct intel_crtc_state *cstate);
> diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
> index 82c82e233154..6fa1634e2db5 100644
> --- a/drivers/gpu/drm/i915/intel_pm.c
> +++ b/drivers/gpu/drm/i915/intel_pm.c
> @@ -5197,16 +5197,15 @@ static inline bool skl_ddb_entries_overlap(const struct skl_ddb_entry *a,
>  	return a->start < b->end && b->start < a->end;
>  }
>  
> -bool skl_ddb_allocation_overlaps(struct drm_i915_private *dev_priv,
> -				 const struct skl_ddb_entry **entries,
> -				 const struct skl_ddb_entry *ddb,
> -				 int ignore)
> +bool skl_ddb_allocation_overlaps(const struct skl_ddb_entry *ddb,
> +				 const struct skl_ddb_entry entries[],
> +				 int num_entries, int ignore_idx)
>  {
> -	enum pipe pipe;
> +	int i;
>  
> -	for_each_pipe(dev_priv, pipe) {
> -		if (pipe != ignore && entries[pipe] &&
> -		    skl_ddb_entries_overlap(ddb, entries[pipe]))
> +	for (i = 0; i < num_entries; i++) {
> +		if (i != ignore_idx &&
> +		    skl_ddb_entries_overlap(ddb, &entries[i]))
>  			return true;
>  	}
>  
> -- 
> 2.18.1
> 
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx at lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx


More information about the Intel-gfx mailing list