[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Remaining DSC + FEC patches
Patchwork
patchwork at emeril.freedesktop.org
Wed Nov 14 02:14:40 UTC 2018
== Series Details ==
Series: Remaining DSC + FEC patches
URL : https://patchwork.freedesktop.org/series/52461/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
b72e39779b9c drm/dsc: Modify DRM helper to return complete DSC color depth capabilities
d5bda8fc9dfd drm/dsc: Define Display Stream Compression PPS infoframe
-:31: WARNING:FILE_PATH_CHANGES: added, moved or deleted file(s), does MAINTAINERS need updating?
#31:
new file mode 100644
total: 0 errors, 1 warnings, 0 checks, 342 lines checked
bccacb6d076d drm/dsc: Define VESA Display Stream Compression Capabilities
-:34: WARNING:BAD_SIGN_OFF: Non-standard signature: Co-developed-by:
#34:
Co-developed-by: Gaurav K Singh <gaurav.k.singh at intel.com>
-:73: CHECK:BOOL_MEMBER: Avoid using bool structure members because of possible alignment issues - see: https://lkml.org/lkml/2017/11/21/384
#73: FILE: include/drm/drm_dsc.h:40:
+ bool convert_rgb;
-:83: CHECK:BOOL_MEMBER: Avoid using bool structure members because of possible alignment issues - see: https://lkml.org/lkml/2017/11/21/384
#83: FILE: include/drm/drm_dsc.h:50:
+ bool enable422;
-:108: CHECK:BOOL_MEMBER: Avoid using bool structure members because of possible alignment issues - see: https://lkml.org/lkml/2017/11/21/384
#108: FILE: include/drm/drm_dsc.h:75:
+ bool block_pred_enable;
-:136: CHECK:BOOL_MEMBER: Avoid using bool structure members because of possible alignment issues - see: https://lkml.org/lkml/2017/11/21/384
#136: FILE: include/drm/drm_dsc.h:103:
+ bool vbr_enable;
-:151: CHECK:BOOL_MEMBER: Avoid using bool structure members because of possible alignment issues - see: https://lkml.org/lkml/2017/11/21/384
#151: FILE: include/drm/drm_dsc.h:118:
+ bool native_422;
-:153: CHECK:BOOL_MEMBER: Avoid using bool structure members because of possible alignment issues - see: https://lkml.org/lkml/2017/11/21/384
#153: FILE: include/drm/drm_dsc.h:120:
+ bool native_420;
total: 0 errors, 1 warnings, 6 checks, 121 lines checked
8b49256df332 drm/dsc: Define Rate Control values that do not change over configurations
-:42: WARNING:NO_AUTHOR_SIGN_OFF: Missing Signed-off-by: line by nominal patch author 'Srivatsa, Anusha <anusha.srivatsa at intel.com>'
total: 0 errors, 1 warnings, 0 checks, 12 lines checked
7672bdc04d1d drm/dsc: Add helpers for DSC picture parameter set infoframes
-:79: WARNING:FILE_PATH_CHANGES: added, moved or deleted file(s), does MAINTAINERS need updating?
#79:
new file mode 100644
total: 0 errors, 1 warnings, 0 checks, 285 lines checked
7b3dae68ebbf drm/dsc: Define the DSC 1.1 and 1.2 Line Buffer depth constants
96ce38e6a2ff drm/i915/dp: Add DSC params and DSC config to intel_crtc_state
-:49: CHECK:BOOL_MEMBER: Avoid using bool structure members because of possible alignment issues - see: https://lkml.org/lkml/2017/11/21/384
#49: FILE: drivers/gpu/drm/i915/intel_drv.h:942:
+ bool compression_enable;
-:50: CHECK:BOOL_MEMBER: Avoid using bool structure members because of possible alignment issues - see: https://lkml.org/lkml/2017/11/21/384
#50: FILE: drivers/gpu/drm/i915/intel_drv.h:943:
+ bool dsc_split;
total: 0 errors, 0 warnings, 2 checks, 22 lines checked
2c83276c3c4c drm/i915/dp: Compute DSC pipe config in atomic check
-:309: WARNING:TABSTOP: Statements should start on a tabstop
#309: FILE: drivers/gpu/drm/i915/intel_dp.c:2032:
+ else
total: 0 errors, 1 warnings, 0 checks, 310 lines checked
969277b592d1 drm/i915/dp: Do not enable PSR2 if DSC is enabled
63f59e9e7a3b drm/i915/dsc: Define & Compute VESA DSC params
-:68: WARNING:BAD_SIGN_OFF: Non-standard signature: Co-developed-by:
#68:
Co-developed-by: Manasi Navare <manasi.d.navare at intel.com>
-:95: WARNING:MISSING_SPACE: break quoted strings at a space character
#95: FILE: drivers/gpu/drm/i915/intel_dp.c:1964:
+ DRM_DEBUG_KMS("Cannot compute valid DSC parameters for Input Bpp = %d"
+ "Compressed BPP = %d\n",
-:119: WARNING:FILE_PATH_CHANGES: added, moved or deleted file(s), does MAINTAINERS need updating?
#119:
new file mode 100644
-:405: CHECK:LINE_SPACING: Please use a blank line after function/struct/union/enum declarations
#405: FILE: drivers/gpu/drm/i915/intel_vdsc.c:282:
+}
+};
total: 0 errors, 3 warnings, 1 checks, 496 lines checked
44af64fc1f3c drm/i915/dsc: Compute Rate Control parameters for DSC
-:141: CHECK:SPACING: space preferred before that '*' (ctx:VxE)
#141: FILE: drivers/gpu/drm/i915/intel_vdsc.c:411:
+ vdsc_cfg->slice_bpg_offset)*
^
-:173: CHECK:LINE_SPACING: Please don't use multiple blank lines
#173: FILE: drivers/gpu/drm/i915/intel_vdsc.c:443:
+
+
total: 0 errors, 0 warnings, 2 checks, 136 lines checked
7411ddd14780 drm/i915/dp: Enable/Disable DSC in DP Sink
bb92419095f2 drm/i915/dsc: Add a power domain for VDSC on eDP/MIPI DSI
a7a9b4502148 drm/i915/dp: Configure i915 Picture parameter Set registers during DSC enabling
-:45: CHECK:AVOID_EXTERNS: extern prototypes should be avoided in .h files
#45: FILE: drivers/gpu/drm/i915/i915_drv.h:3493:
+extern void intel_dsc_enable(struct intel_encoder *encoder,
-:369: CHECK:SPACING: spaces preferred around that '/' (ctx:VxV)
#369: FILE: drivers/gpu/drm/i915/intel_vdsc.c:862:
+ rc_buf_thresh_dword[i/4] |= (u32)(vdsc_cfg->rc_buf_thresh[i] <<
^
-:372: CHECK:SPACING: spaces preferred around that '/' (ctx:VxV)
#372: FILE: drivers/gpu/drm/i915/intel_vdsc.c:865:
+ rc_buf_thresh_dword[i/4]);
^
-:413: WARNING:LONG_LINE: line over 100 characters
#413: FILE: drivers/gpu/drm/i915/intel_vdsc.c:906:
+ rc_range_params_dword[i/2] |= (u32)(((vdsc_cfg->rc_range_params[i].range_bpg_offset <<
-:413: CHECK:SPACING: spaces preferred around that '/' (ctx:VxV)
#413: FILE: drivers/gpu/drm/i915/intel_vdsc.c:906:
+ rc_range_params_dword[i/2] |= (u32)(((vdsc_cfg->rc_range_params[i].range_bpg_offset <<
^
-:420: CHECK:SPACING: spaces preferred around that '/' (ctx:VxV)
#420: FILE: drivers/gpu/drm/i915/intel_vdsc.c:913:
+ rc_range_params_dword[i/2]);
^
-:498: CHECK:BRACES: Blank lines aren't necessary after an open brace '{'
#498: FILE: drivers/gpu/drm/i915/intel_vdsc.c:991:
+{
+
-:505: WARNING:RETURN_VOID: void function return statements are not generally useful
#505: FILE: drivers/gpu/drm/i915/intel_vdsc.c:998:
+ return;
+}
total: 0 errors, 2 warnings, 6 checks, 449 lines checked
e9add730ac8e drm/i915/dp: Use the existing write_infoframe() for DSC PPS SDPs
c5a9d7a3edb0 drm/i915/dp: Populate DSC PPS SDP and send PPS infoframes
bc5d8173bf92 drm/i915/dp: Configure Display stream splitter registers during DSC enable
4b3e4c773bf4 drm/i915/dp: Disable DSC in source by disabling DSS CTL bits
-:35: CHECK:AVOID_EXTERNS: extern prototypes should be avoided in .h files
#35: FILE: drivers/gpu/drm/i915/i915_drv.h:3495:
+extern void intel_dsc_disable(const struct intel_crtc_state *crtc_state);
-:91: CHECK:BRACES: Blank lines aren't necessary before a close brace '}'
#91: FILE: drivers/gpu/drm/i915/intel_vdsc.c:1072:
+
+}
total: 0 errors, 0 warnings, 2 checks, 50 lines checked
9fe2d8f29a56 drm/i915/dsc: Enable and disable appropriate power wells for VDSC
35c693dd421d drm/i915/dsc: Add Per connector debugfs node for DSC support/enable
-:127: WARNING:SYMBOLIC_PERMS: Symbolic permissions 'S_IRUGO' are not preferred. Consider using octal permissions '0444'.
#127: FILE: drivers/gpu/drm/i915/i915_debugfs.c:5187:
+ debugfs_create_file("i915_dsc_support", S_IRUGO, root,
-:163: CHECK:BOOL_MEMBER: Avoid using bool structure members because of possible alignment issues - see: https://lkml.org/lkml/2017/11/21/384
#163: FILE: drivers/gpu/drm/i915/intel_drv.h:1205:
+ bool force_dsc_en;
total: 0 errors, 1 warnings, 1 checks, 118 lines checked
f33cddff8435 i915/dp/fec: Add fec_enable to the crtc state.
-:121: CHECK:BOOL_MEMBER: Avoid using bool structure members because of possible alignment issues - see: https://lkml.org/lkml/2017/11/21/384
#121: FILE: drivers/gpu/drm/i915/intel_drv.h:950:
+ bool fec_enable;
total: 0 errors, 0 warnings, 1 checks, 64 lines checked
0aeb642c2e15 drm/i915/fec: Set FEC_READY in FEC_CONFIGURATION
054e17f42f24 i915/dp/fec: Configure the Forward Error Correction bits.
a3127f4f2f7b drm/i915/fec: Disable FEC state.
More information about the Intel-gfx
mailing list