[Intel-gfx] [PATCH v3] drm/i915/hdmi: Reorder structure to match specification

Jani Nikula jani.nikula at linux.intel.com
Thu Nov 15 14:04:59 UTC 2018


On Wed, 31 Oct 2018, clinton.a.taylor at intel.com wrote:
> From: Clint Taylor <clinton.a.taylor at intel.com>
>
> reorder structure of 297, 594 N values to group Audio Sample Frequencies
> together to make updating from HDMI specification easier.
>
> V2: Match patch 1/2 version
> V3: Arrange by sample freq, then pixel clock.
>
> Cc: Jani Nikula <jani.nikula at linux.intel.com>
> Signed-off-by: Clint Taylor <clinton.a.taylor at intel.com>

Pushed, thanks for the patch.

BR,
Jani.

> ---
>  drivers/gpu/drm/i915/intel_audio.c | 32 ++++++++++++++++----------------
>  1 file changed, 16 insertions(+), 16 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_audio.c b/drivers/gpu/drm/i915/intel_audio.c
> index ccd88da..ae55a68 100644
> --- a/drivers/gpu/drm/i915/intel_audio.c
> +++ b/drivers/gpu/drm/i915/intel_audio.c
> @@ -153,32 +153,32 @@ struct dp_aud_n_m {
>  	int n;
>  	int cts;
>  } hdmi_aud_ncts[] = {
> -	{ 44100, TMDS_296M, 4459, 234375 },
> -	{ 44100, TMDS_297M, 4704, 247500 },
> -	{ 48000, TMDS_296M, 5824, 281250 },
> -	{ 48000, TMDS_297M, 5120, 247500 },
>  	{ 32000, TMDS_296M, 5824, 421875 },
>  	{ 32000, TMDS_297M, 3072, 222750 },
> +	{ 32000, TMDS_593M, 5824, 843750 },
> +	{ 32000, TMDS_594M, 3072, 445500 },
> +	{ 44100, TMDS_296M, 4459, 234375 },
> +	{ 44100, TMDS_297M, 4704, 247500 },
> +	{ 44100, TMDS_593M, 8918, 937500 },
> +	{ 44100, TMDS_594M, 9408, 990000 },
>  	{ 88200, TMDS_296M, 8918, 234375 },
>  	{ 88200, TMDS_297M, 9408, 247500 },
> -	{ 96000, TMDS_296M, 11648, 281250 },
> -	{ 96000, TMDS_297M, 10240, 247500 },
> +	{ 88200, TMDS_593M, 17836, 937500 },
> +	{ 88200, TMDS_594M, 18816, 990000 },
>  	{ 176400, TMDS_296M, 17836, 234375 },
>  	{ 176400, TMDS_297M, 18816, 247500 },
> -	{ 192000, TMDS_296M, 23296, 281250 },
> -	{ 192000, TMDS_297M, 20480, 247500 },
> -	{ 44100, TMDS_593M, 8918, 937500 },
> -	{ 44100, TMDS_594M, 9408, 990000 },
> +	{ 176400, TMDS_593M, 35672, 937500 },
> +	{ 176400, TMDS_594M, 37632, 990000 },
> +	{ 48000, TMDS_296M, 5824, 281250 },
> +	{ 48000, TMDS_297M, 5120, 247500 },
>  	{ 48000, TMDS_593M, 5824, 562500 },
>  	{ 48000, TMDS_594M, 6144, 594000 },
> -	{ 32000, TMDS_593M, 5824, 843750 },
> -	{ 32000, TMDS_594M, 3072, 445500 },
> -	{ 88200, TMDS_593M, 17836, 937500 },
> -	{ 88200, TMDS_594M, 18816, 990000 },
> +	{ 96000, TMDS_296M, 11648, 281250 },
> +	{ 96000, TMDS_297M, 10240, 247500 },
>  	{ 96000, TMDS_593M, 11648, 562500 },
>  	{ 96000, TMDS_594M, 12288, 594000 },
> -	{ 176400, TMDS_593M, 35672, 937500 },
> -	{ 176400, TMDS_594M, 37632, 990000 },
> +	{ 192000, TMDS_296M, 23296, 281250 },
> +	{ 192000, TMDS_297M, 20480, 247500 },
>  	{ 192000, TMDS_593M, 23296, 562500 },
>  	{ 192000, TMDS_594M, 24576, 594000 },
>  };

-- 
Jani Nikula, Intel Open Source Graphics Center


More information about the Intel-gfx mailing list