[Intel-gfx] [PATCH v2 07/13] drm/i915: Pass the entire skl_plane_wm to skl_compute_transition_wm()

[Matt Roper]

On Wed, Nov 14, 2018 at 11:07:23PM +0200, Ville Syrjala wrote:
> From: Ville Syrjälä <ville.syrjala at linux.intel.com>
> 
> We have to pass both level 0 watermark struct and the transition
> watermark struct to skl_compute_transition_wm(). Make life less
> confusing by just passing the entire plane watermark struct that
> contains both aforementioned structures.
> 
> Cc: Matt Roper <matthew.d.roper at intel.com>
> Signed-off-by: Ville Syrjälä <ville.syrjala at linux.intel.com>

Reviewed-by: Matt Roper <matthew.d.roper at intel.com>

> ---
>  drivers/gpu/drm/i915/intel_pm.c | 16 +++++++---------
>  1 file changed, 7 insertions(+), 9 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
> index eb3ce3ee4df3..59c91ec11c60 100644
> --- a/drivers/gpu/drm/i915/intel_pm.c
> +++ b/drivers/gpu/drm/i915/intel_pm.c
> @@ -4894,10 +4894,9 @@ skl_compute_linetime_wm(const struct intel_crtc_state *cstate)
>  }
>  
>  static void skl_compute_transition_wm(const struct intel_crtc_state *cstate,
> -				      struct skl_wm_params *wp,
> -				      struct skl_wm_level *wm_l0,
> -				      uint16_t ddb_allocation,
> -				      struct skl_wm_level *trans_wm /* out */)
> +				      const struct skl_wm_params *wp,
> +				      struct skl_plane_wm *wm,
> +				      uint16_t ddb_allocation)
>  {
>  	struct drm_device *dev = cstate->base.crtc->dev;
>  	const struct drm_i915_private *dev_priv = to_i915(dev);
> @@ -4932,7 +4931,7 @@ static void skl_compute_transition_wm(const struct intel_crtc_state *cstate,
>  	 * Result Blocks is Result Blocks minus 1 and it should work for the
>  	 * current platforms.
>  	 */
> -	wm0_sel_res_b = wm_l0->plane_res_b - 1;
> +	wm0_sel_res_b = wm->wm[0].plane_res_b - 1;
>  
>  	if (wp->y_tiled) {
>  		trans_y_tile_min = (uint16_t) mul_round_up_u32_fixed16(2,
> @@ -4951,8 +4950,8 @@ static void skl_compute_transition_wm(const struct intel_crtc_state *cstate,
>  	res_blocks += 1;
>  
>  	if (res_blocks < ddb_allocation) {
> -		trans_wm->plane_res_b = res_blocks;
> -		trans_wm->plane_en = true;
> +		wm->trans_wm.plane_res_b = res_blocks;
> +		wm->trans_wm.plane_en = true;
>  	}
>  }
>  
> @@ -4981,8 +4980,7 @@ static int __skl_build_plane_wm_single(struct skl_ddb_allocation *ddb,
>  	if (ret)
>  		return ret;
>  
> -	skl_compute_transition_wm(cstate, &wm_params, &wm->wm[0],
> -				  ddb_blocks, &wm->trans_wm);
> +	skl_compute_transition_wm(cstate, &wm_params, wm, ddb_blocks);
>  
>  	return 0;
>  }
> -- 
> 2.18.1
> 

-- 
Matt Roper
Graphics Software Engineer
IoTG Platform Enabling & Development
Intel Corporation
(916) 356-2795