[Intel-gfx] ✓ Fi.CI.BAT: success for Respin of remaining DSC + FEC patches
Patchwork
patchwork at emeril.freedesktop.org
Tue Nov 20 19:29:29 UTC 2018
== Series Details ==
Series: Respin of remaining DSC + FEC patches
URL : https://patchwork.freedesktop.org/series/52781/
State : success
== Summary ==
= CI Bug Log - changes from CI_DRM_5174 -> Patchwork_10869 =
== Summary - SUCCESS ==
No regressions found.
External URL: https://patchwork.freedesktop.org/api/1.0/series/52781/revisions/1/mbox/
== Known issues ==
Here are the changes found in Patchwork_10869 that come from known issues:
=== IGT changes ===
==== Issues hit ====
igt at gem_ctx_create@basic-files:
fi-icl-u2: PASS -> DMESG-WARN (fdo#107724)
igt at kms_pipe_crc_basic@nonblocking-crc-pipe-a-frame-sequence:
fi-byt-clapper: PASS -> FAIL (fdo#107362, fdo#103191)
igt at kms_pipe_crc_basic@read-crc-pipe-b:
fi-byt-clapper: PASS -> FAIL (fdo#107362)
==== Possible fixes ====
igt at gem_exec_suspend@basic-s3:
fi-icl-u2: DMESG-WARN (fdo#107724) -> PASS
igt at i915_selftest@live_execlists:
fi-apl-guc: DMESG-WARN (fdo#108622) -> PASS
igt at kms_flip@basic-flip-vs-dpms:
fi-skl-6700hq: DMESG-WARN (fdo#105998) -> PASS
fdo#103191 https://bugs.freedesktop.org/show_bug.cgi?id=103191
fdo#105998 https://bugs.freedesktop.org/show_bug.cgi?id=105998
fdo#107362 https://bugs.freedesktop.org/show_bug.cgi?id=107362
fdo#107724 https://bugs.freedesktop.org/show_bug.cgi?id=107724
fdo#108622 https://bugs.freedesktop.org/show_bug.cgi?id=108622
== Participating hosts (52 -> 45) ==
Missing (7): fi-kbl-soraka fi-ilk-m540 fi-hsw-4200u fi-hsw-peppy fi-byt-squawks fi-bsw-cyan fi-icl-u3
== Build changes ==
* Linux: CI_DRM_5174 -> Patchwork_10869
CI_DRM_5174: 0bfa7192170c039a271ebc27222b4b91516e73f6 @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_4722: fdcdfa1e220c5070072d5dac9523cd105e7406c2 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_10869: e95ff6bc66aad8bae971e61143107d032c25b9bb @ git://anongit.freedesktop.org/gfx-ci/linux
== Linux commits ==
e95ff6bc66aa drm/i915/fec: Disable FEC state.
ad56252fd46e i915/dp/fec: Configure the Forward Error Correction bits.
d38e09c8d991 drm/i915/fec: Set FEC_READY in FEC_CONFIGURATION
fef051c49e3c i915/dp/fec: Add fec_enable to the crtc state.
82aebc9e1c88 drm/i915/dsc: Enable and disable appropriate power wells for VDSC
417ab30c448b drm/i915/dp: Disable DSC in source by disabling DSS CTL bits
fb7745f881e6 drm/i915/dp: Configure Display stream splitter registers during DSC enable
c34e300a58e5 drm/i915/dp: Populate DSC PPS SDP and send PPS infoframes
4548baa9da14 drm/i915/dp: Use the existing write_infoframe() for DSC PPS SDPs
f87a34c1eb7e drm/i915/dp: Configure i915 Picture parameter Set registers during DSC enabling
45a2fece864d drm/i915/dsc: Add a power domain for VDSC on eDP/MIPI DSI
0b22b472ebcb drm/i915/dp: Enable/Disable DSC in DP Sink
db901e30a037 drm/i915/dsc: Compute Rate Control parameters for DSC
9fbdaa92dab4 drm/i915/dsc: Define & Compute VESA DSC params
be95861715ab drm/i915/dp: Do not enable PSR2 if DSC is enabled
db356f2721ef drm/i915/dp: Compute DSC pipe config in atomic check
c24373fbec9f drm/i915/dp: Add DSC params and DSC config to intel_crtc_state
de9e97e60143 drm/dsc: Define the DSC 1.1 and 1.2 Line Buffer depth constants
d1679441f001 drm/dsc: Add helpers for DSC picture parameter set infoframes
fb2dad924fca drm/dsc: Define Rate Control values that do not change over configurations
5c29875bf189 drm/dsc: Define VESA Display Stream Compression Capabilities
a82354d4ddcd drm/dsc: Define Display Stream Compression PPS infoframe
72d53683f5ab drm/dsc: Modify DRM helper to return complete DSC color depth capabilities
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_10869/issues.html
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