[Intel-gfx] [PATCH 0/6] ICL DSI PLL enable

Vandita Kulkarni vandita.kulkarni at intel.com
Tue Nov 27 09:39:02 UTC 2018

As per the discussion with hw team, the same
sequence can be used for enabling DPLL for mipi dsi
as well. Hence reusing the dpll functions from icl pll manager.
In addition to that we need to program
the esc clock register before enabling dsi.

This has been tested on git://people.freedesktop.org/~jani/drm
and the patches are rebased on this.

Madhav Chauhan (3):
  drm/i915/icl: Calculate DPLL params for DSI
  drm/i915/icl: Gate clocks for DSI
  drm/i915/icl: Ungate DSI clocks

Vandita Kulkarni (3):
  drm/i915/icl: Use the same pll functions for dsi
  drm/i915/icl: Get port clock from pll.
  drm/i915/icl: Update port clock in compute config

 drivers/gpu/drm/i915/icl_dsi.c        | 62 ++++++++++++++++++++++++++++++++---
 drivers/gpu/drm/i915/intel_ddi.c      |  2 +-
 drivers/gpu/drm/i915/intel_display.c  |  4 ++-
 drivers/gpu/drm/i915/intel_dpll_mgr.c |  6 ++--
 drivers/gpu/drm/i915/intel_dsi.h      |  4 +++
 5 files changed, 68 insertions(+), 10 deletions(-)


More information about the Intel-gfx mailing list