[Intel-gfx] [PATCH 3/3] drm/i915: Assert the csb tail is within bounds
Chris Wilson
chris at chris-wilson.co.uk
Tue Nov 27 17:48:18 UTC 2018
Quoting Mika Kuoppala (2018-11-27 17:38:45)
> Make sure that the tail we get from hardware fits
> within the bounds dictated by our count of csb entries.
>
> Cc: Chris Wilson <chris at chris-wilson.co.uk>
> Cc: Joonas Lahtinen <joonas.lahtinen at linux.intel.com>
> Signed-off-by: Mika Kuoppala <mika.kuoppala at linux.intel.com>
> ---
> drivers/gpu/drm/i915/intel_lrc.c | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c
> index 107244ab09ef..1a34e91c1305 100644
> --- a/drivers/gpu/drm/i915/intel_lrc.c
> +++ b/drivers/gpu/drm/i915/intel_lrc.c
> @@ -888,6 +888,7 @@ static void process_csb(struct intel_engine_cs *engine)
> */
> head = execlists->csb_head;
> tail = READ_ONCE(*execlists->csb_write);
> + GEM_DEBUG_BUG_ON(tail >= execlists->csb_entries);
> GEM_TRACE("%s cs-irq head=%d, tail=%d\n", engine->name, head, tail);
Apply the assert after the debug trace.
-Chris
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