[Intel-gfx] [PATCH v2 1/2] drm/i915/guc: fix GuC suspend/resume

Daniele Ceraolo Spurio daniele.ceraolospurio at intel.com
Tue Nov 27 19:34:46 UTC 2018



On 26/11/2018 06:51, Michal Wajdeczko wrote:
> On Wed, 17 Oct 2018 00:46:47 +0200, Daniele Ceraolo Spurio 
> <daniele.ceraolospurio at intel.com> wrote:
> 
> /snip/
> 
>> diff --git a/drivers/gpu/drm/i915/intel_guc_fwif.h 
>> b/drivers/gpu/drm/i915/intel_guc_fwif.h
>> index 8382d591c784..1a853cc627e3 100644
>> --- a/drivers/gpu/drm/i915/intel_guc_fwif.h
>> +++ b/drivers/gpu/drm/i915/intel_guc_fwif.h
>> @@ -687,6 +687,13 @@ enum intel_guc_report_status {
>>      INTEL_GUC_REPORT_STATUS_COMPLETE = 0x4,
>>  };
>> +enum intel_guc_sleep_state_status {
>> +    INTEL_GUC_SLEEP_STATE_SUCCESS = 0x0,
>> +    INTEL_GUC_SLEEP_STATE_PREEMPT_TO_IDLE_FAILED = 0x1,
>> +    INTEL_GUC_SLEEP_STATE_ENGINE_RESET_FAILED = 0x2
>> +};
> 
> btw, it used to be 0,1,2 but from some time fw defines above as:
> 
>      INTEL_GUC_SLEEP_STATE_SUCCESS = 0x1,
>      INTEL_GUC_SLEEP_STATE_PREEMPT_TO_IDLE_FAILED = 0x2,
>      INTEL_GUC_SLEEP_STATE_ENGINE_RESET_FAILED = 0x3,
> 
> Michal

Yeah, I think I had already mentioned in some reply that the newer 
firmware does suspend/resume differently, but I haven't looked at the 
details. I'm not even sure if polling the register will still be required.

Daniele


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