[Intel-gfx] [PATCH 1/9] drm/i915: Disable PSR in Apple panels

[Souza, Jose]

On Tue, 2018-11-27 at 15:38 +0200, Ville Syrjälä wrote:
> On Mon, Nov 26, 2018 at 04:37:02PM -0800, José Roberto de Souza
> wrote:
> > i915 yet don't support PSR in Apple panels, so lets keep it
> > disabled
> > while we work on that.
> > 
> > Fixes: 598c6cfe0690 (drm/i915/psr: Enable PSR1 on gen-9+ HW)
> > Cc: Rodrigo Vivi <rodrigo.vivi at intel.com>
> > Cc: Dhinakaran Pandiyan <dhinakaran.pandiyan at intel.com>
> > Signed-off-by: José Roberto de Souza <jose.souza at intel.com>
> > ---
> >  drivers/gpu/drm/drm_dp_helper.c  | 2 ++
> >  drivers/gpu/drm/i915/intel_psr.c | 6 ++++++
> >  include/drm/drm_dp_helper.h      | 1 +
> >  3 files changed, 9 insertions(+)
> > 
> > diff --git a/drivers/gpu/drm/drm_dp_helper.c
> > b/drivers/gpu/drm/drm_dp_helper.c
> > index 6d483487f2b4..6b5a19d3e347 100644
> > --- a/drivers/gpu/drm/drm_dp_helper.c
> > +++ b/drivers/gpu/drm/drm_dp_helper.c
> > @@ -1273,6 +1273,8 @@ static const struct dpcd_quirk
> > dpcd_quirk_list[] = {
> >  	{ OUI(0x00, 0x22, 0xb9), DEVICE_ID_ANY, true,
> > BIT(DP_DPCD_QUIRK_CONSTANT_N) },
> >  	/* LG LP140WF6-SPM1 eDP panel */
> >  	{ OUI(0x00, 0x22, 0xb9), DEVICE_ID('s', 'i', 'v', 'a', 'r',
> > 'T'), false, BIT(DP_DPCD_QUIRK_CONSTANT_N) },
> > +	/* Apple panels needs some additional handling to support PSR
> > */
> > +	{ OUI(0x00, 0x10, 0xfa), DEVICE_ID_ANY, false,
> > BIT(DP_DPCD_QUIRK_PSR_NOT_CURRENTLY_SUPPORTED) }
> >  };
> >  
> >  #undef OUI
> > diff --git a/drivers/gpu/drm/i915/intel_psr.c
> > b/drivers/gpu/drm/i915/intel_psr.c
> > index 572e626eadff..f5d27a02eb28 100644
> > --- a/drivers/gpu/drm/i915/intel_psr.c
> > +++ b/drivers/gpu/drm/i915/intel_psr.c
> > @@ -274,6 +274,12 @@ void intel_psr_init_dpcd(struct intel_dp
> > *intel_dp)
> >  		DRM_DEBUG_KMS("Panel lacks power state control, PSR
> > cannot be enabled\n");
> >  		return;
> >  	}
> > +
> > +	if (drm_dp_has_quirk(&intel_dp->desc,
> > DP_DPCD_QUIRK_PSR_NOT_CURRENTLY_SUPPORTED)) {
> > +		DRM_DEBUG_KMS("PSR support not currently available for
> > this panel\n");
> > +		return;
> > +	}
> > +
> >  	dev_priv->psr.sink_support = true;
> >  	dev_priv->psr.sink_sync_latency =
> >  		intel_dp_get_sink_sync_latency(intel_dp);
> > diff --git a/include/drm/drm_dp_helper.h
> > b/include/drm/drm_dp_helper.h
> > index 3314e91f6eb3..db516c48cda3 100644
> > --- a/include/drm/drm_dp_helper.h
> > +++ b/include/drm/drm_dp_helper.h
> > @@ -1364,6 +1364,7 @@ enum drm_dp_quirk {
> >  	 * to 16 bits. So will give a constant value (0x8000) for
> > compatability.
> >  	 */
> >  	DP_DPCD_QUIRK_CONSTANT_N,
> > +	DP_DPCD_QUIRK_PSR_NOT_CURRENTLY_SUPPORTED,
> 
> Why such a convoluted name? DP_DPCD_QUIRK_NO_PSR?

Okay changing to DP_DPCD_QUIRK_NO_PSR.

> 
> >  };
> >  
> >  /**
> > -- 
> > 2.19.2
> > 
> > _______________________________________________
> > Intel-gfx mailing list
> > Intel-gfx at lists.freedesktop.org
> > https://lists.freedesktop.org/mailman/listinfo/intel-gfx
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