[Intel-gfx] [PATCH v4 19/25] drm/i915/dsc: Add a power domain for VDSC on eDP/MIPI DSI
Imre Deak
imre.deak at intel.com
Mon Oct 1 09:45:43 UTC 2018
On Tue, Sep 18, 2018 at 12:04:35PM -0700, Manasi Navare wrote:
> > > [...]
> > > diff --git a/drivers/gpu/drm/i915/intel_runtime_pm.c b/drivers/gpu/drm/i915/intel_runtime_pm.c
> > > index 480dadb1047b..146e2d6cf954 100644
> > > --- a/drivers/gpu/drm/i915/intel_runtime_pm.c
> > > +++ b/drivers/gpu/drm/i915/intel_runtime_pm.c
> > > @@ -146,6 +146,8 @@ intel_display_power_domain_str(enum intel_display_power_domain domain)
> > > return "MODESET";
> > > case POWER_DOMAIN_GT_IRQ:
> > > return "GT_IRQ";
> > > + case POWER_DOMAIN_VDSC_EDP_MIPI:
> > > + return "VDSC_EDP_MIPI";
> > > default:
> > > MISSING_CASE(domain);
> > > return "?";
> > > @@ -1966,18 +1968,16 @@ void intel_display_power_put(struct drm_i915_private *dev_priv,
> > > BIT_ULL(POWER_DOMAIN_AUDIO) | \
> > > BIT_ULL(POWER_DOMAIN_INIT))
> > > /*
> > > - * - transcoder WD
> > > - * - KVMR (HW control)
> > > + * - eDP/MIPI DSI VDSC
>
> >
> > We're not changing anything in the PW3 domains list, so why changing
> > the above?
>
> These comments are below the PW3 domains define and before the PW2
> domains define. So I thought they were for PW2 domains define. Is
> that not the case?
>
> If its for PW3 then I can keep them as is and if its for PW2 then we
> should have eDP/DSI VDSC , KVMR since KVMR will enable PW2 and PW3.
Yes, the above comments are for PW3.
--Imre
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