[Intel-gfx] [PATCH 4/4] drm/i915/icl: Handle GT interrupts after enabling master

[Chris Wilson]

Quoting Mika Kuoppala (2018-10-02 15:05:52)
> Don't keep master disabled while we handle the current
> interrupts. This should help a little on latency of
> generating the next interrupt.
> 
> Suggested-by: Chris Wilson <chris at chris-wilson.co.uk>
> Cc: Chris Wilson <chris at chris-wilson.co.uk>
> Signed-off-by: Mika Kuoppala <mika.kuoppala at linux.intel.com>
> ---
>  drivers/gpu/drm/i915/i915_irq.c | 4 +---
>  1 file changed, 1 insertion(+), 3 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
> index 5d1f53723388..9d8d5fb68c84 100644
> --- a/drivers/gpu/drm/i915/i915_irq.c
> +++ b/drivers/gpu/drm/i915/i915_irq.c
> @@ -3163,9 +3163,6 @@ static irqreturn_t gen11_irq_handler(int irq, void *arg)
>                 return IRQ_NONE;
>         }
>  
> -       /* Find, clear, then process each source of interrupt. */
> -       gen11_gt_irq_handler(i915, master_ctl);
> -
>         /* IRQs are synced during runtime_suspend, we don't require a wakeref */
>         if (master_ctl & GEN11_DISPLAY_IRQ) {
>                 const u32 disp_ctl = raw_reg_read(regs, GEN11_DISPLAY_INT_CTL);
> @@ -3183,6 +3180,7 @@ static irqreturn_t gen11_irq_handler(int irq, void *arg)
>  
>         gen11_master_intr_enable(regs);
>  
> +       gen11_gt_irq_handler(i915, master_ctl);

Are we not still acking GT_INTR_DW at this point?
-Chris