[Intel-gfx] [PATCH] drm/i915/icl: MBUS B credit change

[Kumar, Mahesh]

Hi,

LGTM

Reviewed-by: Mahesh Kumar <mahesh1.kumar at intel.com>

On 10/4/2018 8:48 PM, Rodrigo Vivi wrote:
> No functional change. But just a minor change to keep
> up with Spec, since it has changed since commit c3cc39c539d4
> ("drm/i915/icl: program mbus during pipe enable")
>
> The instructions previously said to program pipe's
> B credit = 24 / number of pipes, which is 8 for ICL.
> Now the spec gives us direct values independent of number
> of pipes. Let's keep in sync.
>
> Also just a reorder on fields to make easier to compare
> against spec's sequence: A -> BW -> B.
>
> Cc: Lucas De Marchi <lucas.demarchi at intel.com>
> Cc: Paulo Zanoni <paulo.r.zanoni at intel.com>
> Cc: Mahesh Kumar <mahesh1.kumar at intel.com>
> Cc: Arthur J Runyan <arthur.j.runyan at intel.com>
> Signed-off-by: Rodrigo Vivi <rodrigo.vivi at intel.com>
> ---
>   drivers/gpu/drm/i915/intel_display.c | 7 +++----
>   1 file changed, 3 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
> index 36434c5359b1..eb2250a984a8 100644
> --- a/drivers/gpu/drm/i915/intel_display.c
> +++ b/drivers/gpu/drm/i915/intel_display.c
> @@ -5683,10 +5683,9 @@ static void icl_pipe_mbus_enable(struct intel_crtc *crtc)
>   	enum pipe pipe = crtc->pipe;
>   	uint32_t val;
>   
> -	val = MBUS_DBOX_BW_CREDIT(1) | MBUS_DBOX_A_CREDIT(2);
> -
> -	/* Program B credit equally to all pipes */
> -	val |= MBUS_DBOX_B_CREDIT(24 / INTEL_INFO(dev_priv)->num_pipes);
> +	val = MBUS_DBOX_A_CREDIT(2);
> +	val |= MBUS_DBOX_BW_CREDIT(1);
> +	val |= MBUS_DBOX_B_CREDIT(8);
>   
>   	I915_WRITE(PIPE_MBUS_DBOX_CTL(pipe), val);
>   }